1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Andreas Hansson
38 */
39
40#ifndef __MEM_PHYSICAL_HH__
41#define __MEM_PHYSICAL_HH__
42
43#include "base/addr_range_map.hh"
44#include "mem/packet.hh"
45
46/**
47 * Forward declaration to avoid header dependencies.
48 */
49class AbstractMemory;
50
51/**
52 * The physical memory encapsulates all memories in the system and
53 * provides basic functionality for accessing those memories without
54 * going through the memory system and interconnect.
55 *
56 * The physical memory is also responsible for providing the host
57 * system backingstore used by the memories in the simulated guest
58 * system. When the system is created, the physical memory allocates
59 * the backing store based on the address ranges that are populated in
60 * the system, and does so independent of how those map to actual
61 * memory controllers. Thus, the physical memory completely abstracts
62 * the mapping of the backing store of the host system and the address
63 * mapping in the guest system. This enables us to arbitrarily change
64 * the number of memory controllers, and their address mapping, as
65 * long as the ranges stay the same.
66 */
67class PhysicalMemory : public Serializable
68{
69
70 private:
71
72 // Name for debugging
73 std::string _name;
74
75 // Global address map
76 AddrRangeMap<AbstractMemory*> addrMap;
77
78 // a mutable cache for the last address map iterator that matched
79 // an address
80 mutable AddrRangeMap<AbstractMemory*>::const_iterator rangeCache;
81
82 // All address-mapped memories
83 std::vector<AbstractMemory*> memories;
84
85 // The total memory size
86 uint64_t size;
87
88 // Let the user choose if we reserve swap space when calling mmap
89 const bool mmapUsingNoReserve;
90
91 // The physical memory used to provide the memory in the simulated
92 // system
93 std::vector<std::pair<AddrRange, uint8_t*>> backingStore;
94
95 // Prevent copying
96 PhysicalMemory(const PhysicalMemory&);
97
98 // Prevent assignment
99 PhysicalMemory& operator=(const PhysicalMemory&);
100
101 /**
102 * Create the memory region providing the backing store for a
103 * given address range that corresponds to a set of memories in
104 * the simulated system.
105 *
106 * @param range The address range covered
107 * @param memories The memories this range maps to
108 */
109 void createBackingStore(AddrRange range,
110 const std::vector<AbstractMemory*>& _memories);
111
112 public:
113
114 /**
115 * Create a physical memory object, wrapping a number of memories.
116 */
117 PhysicalMemory(const std::string& _name,
118 const std::vector<AbstractMemory*>& _memories,
119 bool mmap_using_noreserve);
120
121 /**
122 * Unmap all the backing store we have used.
123 */
124 ~PhysicalMemory();
125
126 /**
127 * Return the name for debugging and for creation of sections for
128 * checkpointing.
129 */
130 const std::string name() const { return _name; }
131
132 /**
133 * Check if a physical address is within a range of a memory that
134 * is part of the global address map.
135 *
136 * @param addr A physical address
137 * @return Whether the address corresponds to a memory
138 */
139 bool isMemAddr(Addr addr) const;
140
141 /**
142 * Get the memory ranges for all memories that are to be reported
143 * to the configuration table. The ranges are merged before they
144 * are returned such that any interleaved ranges appear as a
145 * single range.
146 *
147 * @return All configuration table memory ranges
148 */
149 AddrRangeList getConfAddrRanges() const;
150
151 /**
152 * Get the total physical memory size.
153 *
154 * @return The sum of all memory sizes
155 */
156 uint64_t totalSize() const { return size; }
157
158 /**
159 * Get the pointers to the backing store for external host
160 * access. Note that memory in the guest should be accessed using
161 * access() or functionalAccess(). This interface is primarily
162 * intended for CPU models using hardware virtualization. Note
163 * that memories that are null are not present, and that the
164 * backing store may also contain memories that are not part of
165 * the OS-visible global address map and thus are allowed to
166 * overlap.
167 *
168 * @return Pointers to the memory backing store
169 */
170 std::vector<std::pair<AddrRange, uint8_t*>> getBackingStore() const
171 { return backingStore; }
172
173 /**
174 * Perform an untimed memory access and update all the state
175 * (e.g. locked addresses) and statistics accordingly. The packet
176 * is turned into a response if required.
177 *
178 * @param pkt Packet performing the access
179 */
180 void access(PacketPtr pkt);
181
182 /**
183 * Perform an untimed memory read or write without changing
184 * anything but the memory itself. No stats are affected by this
185 * access. In addition to normal accesses this also facilitates
186 * print requests.
187 *
188 * @param pkt Packet performing the access
189 */
190 void functionalAccess(PacketPtr pkt);
191
192 /**
193 * Serialize all the memories in the system. This is independent
194 * of the logical memory layout, and the serialization only sees
195 * the contigous backing store, independent of how this maps to
196 * logical memories in the guest system.
197 *
198 * @param os stream to serialize to
199 */
| 1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Andreas Hansson
38 */
39
40#ifndef __MEM_PHYSICAL_HH__
41#define __MEM_PHYSICAL_HH__
42
43#include "base/addr_range_map.hh"
44#include "mem/packet.hh"
45
46/**
47 * Forward declaration to avoid header dependencies.
48 */
49class AbstractMemory;
50
51/**
52 * The physical memory encapsulates all memories in the system and
53 * provides basic functionality for accessing those memories without
54 * going through the memory system and interconnect.
55 *
56 * The physical memory is also responsible for providing the host
57 * system backingstore used by the memories in the simulated guest
58 * system. When the system is created, the physical memory allocates
59 * the backing store based on the address ranges that are populated in
60 * the system, and does so independent of how those map to actual
61 * memory controllers. Thus, the physical memory completely abstracts
62 * the mapping of the backing store of the host system and the address
63 * mapping in the guest system. This enables us to arbitrarily change
64 * the number of memory controllers, and their address mapping, as
65 * long as the ranges stay the same.
66 */
67class PhysicalMemory : public Serializable
68{
69
70 private:
71
72 // Name for debugging
73 std::string _name;
74
75 // Global address map
76 AddrRangeMap<AbstractMemory*> addrMap;
77
78 // a mutable cache for the last address map iterator that matched
79 // an address
80 mutable AddrRangeMap<AbstractMemory*>::const_iterator rangeCache;
81
82 // All address-mapped memories
83 std::vector<AbstractMemory*> memories;
84
85 // The total memory size
86 uint64_t size;
87
88 // Let the user choose if we reserve swap space when calling mmap
89 const bool mmapUsingNoReserve;
90
91 // The physical memory used to provide the memory in the simulated
92 // system
93 std::vector<std::pair<AddrRange, uint8_t*>> backingStore;
94
95 // Prevent copying
96 PhysicalMemory(const PhysicalMemory&);
97
98 // Prevent assignment
99 PhysicalMemory& operator=(const PhysicalMemory&);
100
101 /**
102 * Create the memory region providing the backing store for a
103 * given address range that corresponds to a set of memories in
104 * the simulated system.
105 *
106 * @param range The address range covered
107 * @param memories The memories this range maps to
108 */
109 void createBackingStore(AddrRange range,
110 const std::vector<AbstractMemory*>& _memories);
111
112 public:
113
114 /**
115 * Create a physical memory object, wrapping a number of memories.
116 */
117 PhysicalMemory(const std::string& _name,
118 const std::vector<AbstractMemory*>& _memories,
119 bool mmap_using_noreserve);
120
121 /**
122 * Unmap all the backing store we have used.
123 */
124 ~PhysicalMemory();
125
126 /**
127 * Return the name for debugging and for creation of sections for
128 * checkpointing.
129 */
130 const std::string name() const { return _name; }
131
132 /**
133 * Check if a physical address is within a range of a memory that
134 * is part of the global address map.
135 *
136 * @param addr A physical address
137 * @return Whether the address corresponds to a memory
138 */
139 bool isMemAddr(Addr addr) const;
140
141 /**
142 * Get the memory ranges for all memories that are to be reported
143 * to the configuration table. The ranges are merged before they
144 * are returned such that any interleaved ranges appear as a
145 * single range.
146 *
147 * @return All configuration table memory ranges
148 */
149 AddrRangeList getConfAddrRanges() const;
150
151 /**
152 * Get the total physical memory size.
153 *
154 * @return The sum of all memory sizes
155 */
156 uint64_t totalSize() const { return size; }
157
158 /**
159 * Get the pointers to the backing store for external host
160 * access. Note that memory in the guest should be accessed using
161 * access() or functionalAccess(). This interface is primarily
162 * intended for CPU models using hardware virtualization. Note
163 * that memories that are null are not present, and that the
164 * backing store may also contain memories that are not part of
165 * the OS-visible global address map and thus are allowed to
166 * overlap.
167 *
168 * @return Pointers to the memory backing store
169 */
170 std::vector<std::pair<AddrRange, uint8_t*>> getBackingStore() const
171 { return backingStore; }
172
173 /**
174 * Perform an untimed memory access and update all the state
175 * (e.g. locked addresses) and statistics accordingly. The packet
176 * is turned into a response if required.
177 *
178 * @param pkt Packet performing the access
179 */
180 void access(PacketPtr pkt);
181
182 /**
183 * Perform an untimed memory read or write without changing
184 * anything but the memory itself. No stats are affected by this
185 * access. In addition to normal accesses this also facilitates
186 * print requests.
187 *
188 * @param pkt Packet performing the access
189 */
190 void functionalAccess(PacketPtr pkt);
191
192 /**
193 * Serialize all the memories in the system. This is independent
194 * of the logical memory layout, and the serialization only sees
195 * the contigous backing store, independent of how this maps to
196 * logical memories in the guest system.
197 *
198 * @param os stream to serialize to
199 */
|
201
202 /**
203 * Serialize a specific store.
204 *
205 * @param store_id Unique identifier of this backing store
206 * @param range The address range of this backing store
207 * @param pmem The host pointer to this backing store
208 */
209 void serializeStore(CheckpointOut &cp, unsigned int store_id,
210 AddrRange range, uint8_t* pmem) const;
211
212 /**
213 * Unserialize the memories in the system. As with the
214 * serialization, this action is independent of how the address
215 * ranges are mapped to logical memories in the guest system.
216 */
| 201
202 /**
203 * Serialize a specific store.
204 *
205 * @param store_id Unique identifier of this backing store
206 * @param range The address range of this backing store
207 * @param pmem The host pointer to this backing store
208 */
209 void serializeStore(CheckpointOut &cp, unsigned int store_id,
210 AddrRange range, uint8_t* pmem) const;
211
212 /**
213 * Unserialize the memories in the system. As with the
214 * serialization, this action is independent of how the address
215 * ranges are mapped to logical memories in the guest system.
216 */
|