1/*
2 * Copyright (c) 2011-2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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50
51#ifndef __MEM_BRIDGE_HH__
52#define __MEM_BRIDGE_HH__
53
54#include <list>
55#include <queue>
56#include <string>
57
58#include "base/fast_alloc.hh"
59#include "base/types.hh"
60#include "mem/mem_object.hh"
61#include "mem/packet.hh"
62#include "mem/port.hh"
63#include "params/Bridge.hh"
64#include "sim/eventq.hh"
65
66/**

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80{
81 protected:
82
83 /**
84 * A bridge request state stores packets along with their sender
85 * state and original source. It has enough information to also
86 * restore the response once it comes back to the bridge.
87 */
88 class RequestState : public Packet::SenderState, public FastAlloc
89 {
90
91 public:
92
93 Packet::SenderState *origSenderState;
94 PortID origSrc;
95
96 RequestState(PacketPtr _pkt)

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