SConscript (9164:d112473185ea) SConscript (9243:9b6ff962d62f)
1# -*- mode:python -*-
2
3# Copyright (c) 2006 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright

--- 39 unchanged lines hidden (view full) ---

48Source('tport.cc')
49Source('port_proxy.cc')
50Source('fs_translating_port_proxy.cc')
51Source('se_translating_port_proxy.cc')
52
53if env['TARGET_ISA'] != 'no':
54 SimObject('AbstractMemory.py')
55 SimObject('SimpleMemory.py')
1# -*- mode:python -*-
2
3# Copyright (c) 2006 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright

--- 39 unchanged lines hidden (view full) ---

48Source('tport.cc')
49Source('port_proxy.cc')
50Source('fs_translating_port_proxy.cc')
51Source('se_translating_port_proxy.cc')
52
53if env['TARGET_ISA'] != 'no':
54 SimObject('AbstractMemory.py')
55 SimObject('SimpleMemory.py')
56 SimObject('SimpleDRAM.py')
56 Source('abstract_mem.cc')
57 Source('simple_mem.cc')
58 Source('page_table.cc')
59 Source('physical.cc')
57 Source('abstract_mem.cc')
58 Source('simple_mem.cc')
59 Source('page_table.cc')
60 Source('physical.cc')
61 Source('simple_dram.cc')
60
61DebugFlag('BaseBus')
62DebugFlag('BusAddrRanges')
63DebugFlag('CoherentBus')
64DebugFlag('NoncoherentBus')
65CompoundFlag('Bus', ['BaseBus', 'BusAddrRanges', 'CoherentBus',
66 'NoncoherentBus'])
67
68DebugFlag('Bridge')
69DebugFlag('CommMonitor')
62
63DebugFlag('BaseBus')
64DebugFlag('BusAddrRanges')
65DebugFlag('CoherentBus')
66DebugFlag('NoncoherentBus')
67CompoundFlag('Bus', ['BaseBus', 'BusAddrRanges', 'CoherentBus',
68 'NoncoherentBus'])
69
70DebugFlag('Bridge')
71DebugFlag('CommMonitor')
72DebugFlag('DRAM')
73DebugFlag('DRAMWR')
70DebugFlag('LLSC')
71DebugFlag('MMU')
72DebugFlag('MemoryAccess')
73DebugFlag('PacketQueue')
74
75DebugFlag('ProtocolTrace')
76DebugFlag('RubyCache')
77DebugFlag('RubyCacheTrace')

--- 16 unchanged lines hidden --- 		74DebugFlag('LLSC')
75DebugFlag('MMU')
76DebugFlag('MemoryAccess')
77DebugFlag('PacketQueue')
78
79DebugFlag('ProtocolTrace')
80DebugFlag('RubyCache')
81DebugFlag('RubyCacheTrace')

--- 16 unchanged lines hidden ---