SConscript (11185:0ff78be3bc67) SConscript (12460:0f221912b014)
1# -*- mode:python -*-
2
3# Copyright (c) 2006 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright

--- 59 unchanged lines hidden (view full) ---

68Source('xbar.cc')
69Source('hmc_controller.cc')
70Source('serial_link.cc')
71
72if env['TARGET_ISA'] != 'null':
73 Source('fs_translating_port_proxy.cc')
74 Source('se_translating_port_proxy.cc')
75 Source('page_table.cc')
1# -*- mode:python -*-
2
3# Copyright (c) 2006 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright

--- 59 unchanged lines hidden (view full) ---

68Source('xbar.cc')
69Source('hmc_controller.cc')
70Source('serial_link.cc')
71
72if env['TARGET_ISA'] != 'null':
73 Source('fs_translating_port_proxy.cc')
74 Source('se_translating_port_proxy.cc')
75 Source('page_table.cc')
76if env['TARGET_ISA'] == 'x86':
77 Source('multi_level_page_table.cc')
78
79if env['HAVE_DRAMSIM']:
80 SimObject('DRAMSim2.py')
81 Source('dramsim2_wrapper.cc')
82 Source('dramsim2.cc')
83
84SimObject('MemChecker.py')
85Source('mem_checker.cc')

--- 27 unchanged lines hidden --- 		76
77if env['HAVE_DRAMSIM']:
78 SimObject('DRAMSim2.py')
79 Source('dramsim2_wrapper.cc')
80 Source('dramsim2.cc')
81
82SimObject('MemChecker.py')
83Source('mem_checker.cc')

--- 27 unchanged lines hidden ---