SConscript (10146:27dfed4c8403) | SConscript (10208:c249f7660eb7) |
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1# -*- mode:python -*- 2 3# Copyright (c) 2006 The Regents of The University of Michigan 4# All rights reserved. 5# 6# Redistribution and use in source and binary forms, with or without 7# modification, are permitted provided that the following conditions are 8# met: redistributions of source code must retain the above copyright --- 67 unchanged lines hidden (view full) --- 76DebugFlag('CoherentBus') 77DebugFlag('NoncoherentBus') 78CompoundFlag('Bus', ['BaseBus', 'BusAddrRanges', 'CoherentBus', 79 'NoncoherentBus']) 80 81DebugFlag('Bridge') 82DebugFlag('CommMonitor') 83DebugFlag('DRAM') | 1# -*- mode:python -*- 2 3# Copyright (c) 2006 The Regents of The University of Michigan 4# All rights reserved. 5# 6# Redistribution and use in source and binary forms, with or without 7# modification, are permitted provided that the following conditions are 8# met: redistributions of source code must retain the above copyright --- 67 unchanged lines hidden (view full) --- 76DebugFlag('CoherentBus') 77DebugFlag('NoncoherentBus') 78CompoundFlag('Bus', ['BaseBus', 'BusAddrRanges', 'CoherentBus', 79 'NoncoherentBus']) 80 81DebugFlag('Bridge') 82DebugFlag('CommMonitor') 83DebugFlag('DRAM') |
84DebugFlag('DRAMState') |
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84DebugFlag('LLSC') 85DebugFlag('MMU') 86DebugFlag('MemoryAccess') 87DebugFlag('PacketQueue') 88 89DebugFlag("DRAMSim2") | 85DebugFlag('LLSC') 86DebugFlag('MMU') 87DebugFlag('MemoryAccess') 88DebugFlag('PacketQueue') 89 90DebugFlag("DRAMSim2") |