1# -*- mode:python -*- 2# 3# Copyright (c) 2018 ARM Limited 4# All rights reserved 5# 6# The license below extends only to copyright in the software and shall 7# not be construed as granting a license to any other intellectual 8# property including but not limited to intellectual property relating --- 46 unchanged lines hidden (view full) --- 55SimObject('SimpleMemory.py') 56SimObject('XBar.py') 57SimObject('HMCController.py') 58SimObject('SerialLink.py') 59SimObject('MemDelay.py') 60 61Source('abstract_mem.cc') 62Source('addr_mapper.cc') |
63Source('bridge.cc') 64Source('coherent_xbar.cc') 65Source('drampower.cc') 66Source('dram_ctrl.cc') 67Source('external_master.cc') 68Source('external_slave.cc') |
69Source('mem_object.cc') 70Source('mport.cc') 71Source('noncoherent_xbar.cc') 72Source('packet.cc') 73Source('port.cc') 74Source('packet_queue.cc') 75Source('port_proxy.cc') 76Source('physical.cc') 77Source('secure_port_proxy.cc') |
78Source('simple_mem.cc') 79Source('snoop_filter.cc') 80Source('stack_dist_calc.cc') 81Source('tport.cc') 82Source('xbar.cc') 83Source('hmc_controller.cc') 84Source('serial_link.cc') 85Source('mem_delay.cc') --- 41 unchanged lines hidden --- |