1# -*- mode:python -*-
2
3# Copyright (c) 2006 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright

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61Source('physical.cc')
62Source('simple_dram.cc')
63
64if env['TARGET_ISA'] != 'null':
65 Source('fs_translating_port_proxy.cc')
66 Source('se_translating_port_proxy.cc')
67 Source('page_table.cc')
68
69DebugFlag('BaseBus')
70DebugFlag('BusAddrRanges')
71DebugFlag('CoherentBus')
72DebugFlag('NoncoherentBus')
73CompoundFlag('Bus', ['BaseBus', 'BusAddrRanges', 'CoherentBus',
74 'NoncoherentBus'])
75
76DebugFlag('Bridge')
77DebugFlag('CommMonitor')
78DebugFlag('DRAM')
79DebugFlag('LLSC')
80DebugFlag('MMU')
81DebugFlag('MemoryAccess')
82DebugFlag('PacketQueue')
83
84DebugFlag('ProtocolTrace')
85DebugFlag('RubyCache')
86DebugFlag('RubyCacheTrace')
87DebugFlag('RubyDma')
88DebugFlag('RubyGenerated')
89DebugFlag('RubyMemory')
90DebugFlag('RubyNetwork')
91DebugFlag('RubyPort')

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