1# -*- mode:python -*-
2
3# Copyright (c) 2006 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright

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27# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28#
29# Authors: Nathan Binkert
30
31Import('*')
32
33SimObject('Bridge.py')
34SimObject('Bus.py')
35SimObject('MemObject.py')
36
37Source('bridge.cc')
38Source('bus.cc')
39Source('mem_object.cc')
40Source('mport.cc')
41Source('packet.cc')
42Source('port.cc')
43Source('packet_queue.cc')
44Source('tport.cc')
45Source('port_proxy.cc')
46Source('fs_translating_port_proxy.cc')

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52 Source('abstract_mem.cc')
53 Source('simple_mem.cc')
54 Source('page_table.cc')
55 Source('physical.cc')
56
57DebugFlag('Bus')
58DebugFlag('BusAddrRanges')
59DebugFlag('BusBridge')
60DebugFlag('LLSC')
61DebugFlag('MMU')
62DebugFlag('MemoryAccess')
63DebugFlag('PacketQueue')
64
65DebugFlag('ProtocolTrace')
66DebugFlag('RubyCache')
67DebugFlag('RubyCacheTrace')

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