1# -*- mode:python -*-
2
3# Copyright (c) 2006 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright

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74if env['TARGET_ISA'] == 'x86':
75 Source('multi_level_page_table.cc')
76
77if env['HAVE_DRAMSIM']:
78 SimObject('DRAMSim2.py')
79 Source('dramsim2_wrapper.cc')
80 Source('dramsim2.cc')
81
82DebugFlag('AddrRanges')
83DebugFlag('BaseXBar')
84DebugFlag('CoherentXBar')
85DebugFlag('NoncoherentXBar')
86DebugFlag('SnoopFilter')
87CompoundFlag('XBar', ['BaseXBar', 'CoherentXBar', 'NoncoherentXBar',
88 'SnoopFilter'])
89

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94DebugFlag('DRAMState')
95DebugFlag('ExternalPort')
96DebugFlag('LLSC')
97DebugFlag('MMU')
98DebugFlag('MemoryAccess')
99DebugFlag('PacketQueue')
100
101DebugFlag("DRAMSim2")