1# -*- mode:python -*-
2
3# Copyright (c) 2006 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright

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68Source('xbar.cc')
69Source('hmc_controller.cc')
70Source('serial_link.cc')
71
72if env['TARGET_ISA'] != 'null':
73 Source('fs_translating_port_proxy.cc')
74 Source('se_translating_port_proxy.cc')
75 Source('page_table.cc')
76
77if env['HAVE_DRAMSIM']:
78 SimObject('DRAMSim2.py')
79 Source('dramsim2_wrapper.cc')
80 Source('dramsim2.cc')
81
82SimObject('MemChecker.py')
83Source('mem_checker.cc')

--- 27 unchanged lines hidden ---