t1000.cc (4000:9bf49767a9e4) | t1000.cc (4762:c94e103c83ad) |
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1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 25 unchanged lines hidden (view full) --- 34 35#include <deque> 36#include <string> 37#include <vector> 38 39#include "cpu/intr_control.hh" 40#include "dev/simconsole.hh" 41#include "dev/sparc/t1000.hh" | 1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 25 unchanged lines hidden (view full) --- 34 35#include <deque> 36#include <string> 37#include <vector> 38 39#include "cpu/intr_control.hh" 40#include "dev/simconsole.hh" 41#include "dev/sparc/t1000.hh" |
42#include "sim/builder.hh" | 42#include "params/T1000.hh" |
43#include "sim/system.hh" 44 45using namespace std; 46//Should this be AlphaISA? 47using namespace TheISA; 48 49T1000::T1000(const string &name, System *s, IntrControl *ic) 50 : Platform(name, ic), system(s) --- 45 unchanged lines hidden (view full) --- 96 97Addr 98T1000::calcConfigAddr(int bus, int dev, int func) 99{ 100 panic("Need implementation\n"); 101 M5_DUMMY_RETURN 102} 103 | 43#include "sim/system.hh" 44 45using namespace std; 46//Should this be AlphaISA? 47using namespace TheISA; 48 49T1000::T1000(const string &name, System *s, IntrControl *ic) 50 : Platform(name, ic), system(s) --- 45 unchanged lines hidden (view full) --- 96 97Addr 98T1000::calcConfigAddr(int bus, int dev, int func) 99{ 100 panic("Need implementation\n"); 101 M5_DUMMY_RETURN 102} 103 |
104BEGIN_DECLARE_SIM_OBJECT_PARAMS(T1000) 105 106 SimObjectParam<System *> system; 107 SimObjectParam<IntrControl *> intrctrl; 108 109END_DECLARE_SIM_OBJECT_PARAMS(T1000) 110 111BEGIN_INIT_SIM_OBJECT_PARAMS(T1000) 112 113 INIT_PARAM(system, "system"), 114 INIT_PARAM(intrctrl, "interrupt controller") 115 116END_INIT_SIM_OBJECT_PARAMS(T1000) 117 118CREATE_SIM_OBJECT(T1000) | 104T1000 * 105T1000Params::create() |
119{ | 106{ |
120 return new T1000(getInstanceName(), system, intrctrl); | 107 return new T1000(name, system, intrctrl); |
121} | 108} |
122 123REGISTER_SIM_OBJECT("T1000", T1000) | |