1# Copyright (c) 2006-2007 The Regents of The University of Michigan
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright

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31from Device import BasicPioDevice, PioDevice, IsaFake, BadAddr
32from Platform import Platform
33from Terminal import Terminal
34from Uart import Uart8250
35
36
37class MmDisk(BasicPioDevice):
38 type = 'MmDisk'
39 image = Param.DiskImage("Disk Image")
40 pio_addr = 0x1F40000000
41
42class DumbTOD(BasicPioDevice):
43 type = 'DumbTOD'
44 time = Param.Time('01/01/2009', "System time to use ('Now' for real time)")
45 pio_addr = 0xfff0c1fff8
46
47class Iob(PioDevice):
48 type = 'Iob'
49 platform = Param.Platform(Parent.any, "Platform this device is part of.")
50 pio_latency = Param.Latency('1ns', "Programed IO latency")
51
52
53class T1000(Platform):
54 type = 'T1000'
55 system = Param.System(Parent.any, "system")
56
57 fake_clk = IsaFake(pio_addr=0x9600000000, pio_size=0x100000000)
58 #warn_access="Accessing Clock Unit -- Unimplemented!")
59
60 fake_membnks = IsaFake(pio_addr=0x9700000000, pio_size=16384,
61 ret_data64=0x0000000000000000, update_data=False)
62 #warn_access="Accessing Memory Banks -- Unimplemented!")

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