1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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37#ifndef __DEV_PLATFORM_HH__
38#define __DEV_PLATFORM_HH__
39
40#include <bitset>
41#include <set>
42
43#include "sim/sim_object.hh"
44#include "arch/isa_traits.hh"
45
46class PciConfigAll;
47class IntrControl;
48class SimConsole;
49class Uart;
50class System;
51
52class Platform : public SimObject
53{
54 public:
55 /** Pointer to the interrupt controller */
56 IntrControl *intrctrl;
57
58 /** Pointer to the system for info about the memory system. */
59 System *system;
60
61 public:
62 Platform(const std::string &name, IntrControl *intctrl);
63 virtual ~Platform();
64 virtual void postConsoleInt() = 0;
65 virtual void clearConsoleInt() = 0;
66 virtual Tick intrFrequency() = 0;
67 virtual void postPciInt(int line);
68 virtual void clearPciInt(int line);
69 virtual Addr pciToDma(Addr pciAddr) const;
70 virtual Addr calcConfigAddr(int bus, int dev, int func) = 0;
71 virtual void registerPciDevice(uint8_t bus, uint8_t dev, uint8_t func,
72 uint8_t intr);
73
74 private:
75 std::bitset<256> intLines;
76 std::set<uint32_t> pciDevices;
77
78};
79
80#endif // __DEV_PLATFORM_HH__