isa_fake.cc (4870:fcc39d001154) | isa_fake.cc (4918:3214e3694fb2) |
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1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 22 unchanged lines hidden (view full) --- 31/** @file 32 * Isa Fake Device implementation 33 */ 34 35#include "base/trace.hh" 36#include "dev/isa_fake.hh" 37#include "mem/packet.hh" 38#include "mem/packet_access.hh" | 1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 22 unchanged lines hidden (view full) --- 31/** @file 32 * Isa Fake Device implementation 33 */ 34 35#include "base/trace.hh" 36#include "dev/isa_fake.hh" 37#include "mem/packet.hh" 38#include "mem/packet_access.hh" |
39#include "sim/builder.hh" | |
40#include "sim/system.hh" 41 42using namespace std; 43 44IsaFake::IsaFake(Params *p) 45 : BasicPioDevice(p) 46{ | 39#include "sim/system.hh" 40 41using namespace std; 42 43IsaFake::IsaFake(Params *p) 44 : BasicPioDevice(p) 45{ |
47 if (!params()->retBadAddr) | 46 if (!p->ret_bad_addr) |
48 pioSize = p->pio_size; 49 | 47 pioSize = p->pio_size; 48 |
50 retData8 = params()->retData8; 51 retData16 = params()->retData16; 52 retData32 = params()->retData32; 53 retData64 = params()->retData64; | 49 retData8 = p->ret_data8; 50 retData16 = p->ret_data16; 51 retData32 = p->ret_data32; 52 retData64 = p->ret_data64; |
54} 55 56Tick 57IsaFake::read(PacketPtr pkt) 58{ 59 | 53} 54 55Tick 56IsaFake::read(PacketPtr pkt) 57{ 58 |
60 if (params()->warnAccess != "") | 59 if (params()->warn_access != "") |
61 warn("Device %s accessed by read to address %#x size=%d\n", 62 name(), pkt->getAddr(), pkt->getSize()); | 60 warn("Device %s accessed by read to address %#x size=%d\n", 61 name(), pkt->getAddr(), pkt->getSize()); |
63 if (params()->retBadAddr) { | 62 if (params()->ret_bad_addr) { |
64 DPRINTF(Tsunami, "read to bad address va=%#x size=%d\n", 65 pkt->getAddr(), pkt->getSize()); 66 pkt->setBadAddress(); 67 } else { 68 assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize); 69 DPRINTF(Tsunami, "read va=%#x size=%d\n", 70 pkt->getAddr(), pkt->getSize()); 71 switch (pkt->getSize()) { --- 15 unchanged lines hidden (view full) --- 87 pkt->makeAtomicResponse(); 88 } 89 return pioDelay; 90} 91 92Tick 93IsaFake::write(PacketPtr pkt) 94{ | 63 DPRINTF(Tsunami, "read to bad address va=%#x size=%d\n", 64 pkt->getAddr(), pkt->getSize()); 65 pkt->setBadAddress(); 66 } else { 67 assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize); 68 DPRINTF(Tsunami, "read va=%#x size=%d\n", 69 pkt->getAddr(), pkt->getSize()); 70 switch (pkt->getSize()) { --- 15 unchanged lines hidden (view full) --- 86 pkt->makeAtomicResponse(); 87 } 88 return pioDelay; 89} 90 91Tick 92IsaFake::write(PacketPtr pkt) 93{ |
95 if (params()->warnAccess != "") { | 94 if (params()->warn_access != "") { |
96 uint64_t data; 97 switch (pkt->getSize()) { 98 case sizeof(uint64_t): 99 data = pkt->get<uint64_t>(); 100 break; 101 case sizeof(uint32_t): 102 data = pkt->get<uint32_t>(); 103 break; --- 4 unchanged lines hidden (view full) --- 108 data = pkt->get<uint8_t>(); 109 break; 110 default: 111 panic("invalid access size!\n"); 112 } 113 warn("Device %s accessed by write to address %#x size=%d data=%#x\n", 114 name(), pkt->getAddr(), pkt->getSize(), data); 115 } | 95 uint64_t data; 96 switch (pkt->getSize()) { 97 case sizeof(uint64_t): 98 data = pkt->get<uint64_t>(); 99 break; 100 case sizeof(uint32_t): 101 data = pkt->get<uint32_t>(); 102 break; --- 4 unchanged lines hidden (view full) --- 107 data = pkt->get<uint8_t>(); 108 break; 109 default: 110 panic("invalid access size!\n"); 111 } 112 warn("Device %s accessed by write to address %#x size=%d data=%#x\n", 113 name(), pkt->getAddr(), pkt->getSize(), data); 114 } |
116 if (params()->retBadAddr) { | 115 if (params()->ret_bad_addr) { |
117 DPRINTF(Tsunami, "write to bad address va=%#x size=%d \n", 118 pkt->getAddr(), pkt->getSize()); 119 pkt->setBadAddress(); 120 } else { 121 DPRINTF(Tsunami, "write - va=%#x size=%d \n", 122 pkt->getAddr(), pkt->getSize()); 123 | 116 DPRINTF(Tsunami, "write to bad address va=%#x size=%d \n", 117 pkt->getAddr(), pkt->getSize()); 118 pkt->setBadAddress(); 119 } else { 120 DPRINTF(Tsunami, "write - va=%#x size=%d \n", 121 pkt->getAddr(), pkt->getSize()); 122 |
124 if (params()->updateData) { | 123 if (params()->update_data) { |
125 switch (pkt->getSize()) { 126 case sizeof(uint64_t): 127 retData64 = pkt->get<uint64_t>(); 128 break; 129 case sizeof(uint32_t): 130 retData32 = pkt->get<uint32_t>(); 131 break; 132 case sizeof(uint16_t): --- 6 unchanged lines hidden (view full) --- 139 panic("invalid access size!\n"); 140 } 141 } 142 pkt->makeAtomicResponse(); 143 } 144 return pioDelay; 145} 146 | 124 switch (pkt->getSize()) { 125 case sizeof(uint64_t): 126 retData64 = pkt->get<uint64_t>(); 127 break; 128 case sizeof(uint32_t): 129 retData32 = pkt->get<uint32_t>(); 130 break; 131 case sizeof(uint16_t): --- 6 unchanged lines hidden (view full) --- 138 panic("invalid access size!\n"); 139 } 140 } 141 pkt->makeAtomicResponse(); 142 } 143 return pioDelay; 144} 145 |
147BEGIN_DECLARE_SIM_OBJECT_PARAMS(IsaFake) 148 149 Param<Addr> pio_addr; 150 Param<Tick> pio_latency; 151 Param<Addr> pio_size; 152 Param<bool> ret_bad_addr; 153 Param<bool> update_data; 154 Param<std::string> warn_access; 155 Param<uint8_t> ret_data8; 156 Param<uint16_t> ret_data16; 157 Param<uint32_t> ret_data32; 158 Param<uint64_t> ret_data64; 159 SimObjectParam<Platform *> platform; 160 SimObjectParam<System *> system; 161 162END_DECLARE_SIM_OBJECT_PARAMS(IsaFake) 163 164BEGIN_INIT_SIM_OBJECT_PARAMS(IsaFake) 165 166 INIT_PARAM(pio_addr, "Device Address"), 167 INIT_PARAM(pio_latency, "Programmed IO latency"), 168 INIT_PARAM(pio_size, "Size of address range"), 169 INIT_PARAM(ret_bad_addr, "Return pkt status BadAddr"), 170 INIT_PARAM(update_data, "Update returned data"), 171 INIT_PARAM(warn_access, "Warn if this device is touched"), 172 INIT_PARAM(ret_data8, "Data to return if not bad addr"), 173 INIT_PARAM(ret_data16, "Data to return if not bad addr"), 174 INIT_PARAM(ret_data32, "Data to return if not bad addr"), 175 INIT_PARAM(ret_data64, "Data to return if not bad addr"), 176 INIT_PARAM(platform, "platform"), 177 INIT_PARAM(system, "system object") 178 179END_INIT_SIM_OBJECT_PARAMS(IsaFake) 180 181CREATE_SIM_OBJECT(IsaFake) | 146IsaFake * 147IsaFakeParams::create() |
182{ | 148{ |
183 IsaFake::Params *p = new IsaFake::Params; 184 p->name = getInstanceName(); 185 p->pio_addr = pio_addr; 186 p->pio_delay = pio_latency; 187 p->pio_size = pio_size; 188 p->retBadAddr = ret_bad_addr; 189 p->updateData = update_data; 190 p->warnAccess = warn_access; 191 p->retData8= ret_data8; 192 p->retData16 = ret_data16; 193 p->retData32 = ret_data32; 194 p->retData64 = ret_data64; 195 p->platform = platform; 196 p->system = system; 197 return new IsaFake(p); | 149 return new IsaFake(this); |
198} | 150} |
199 200REGISTER_SIM_OBJECT("IsaFake", IsaFake) | |