isa_fake.cc (3814:33bd4ec9d66a) | isa_fake.cc (4762:c94e103c83ad) |
---|---|
1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 22 unchanged lines hidden (view full) --- 31/** @file 32 * Isa Fake Device implementation 33 */ 34 35#include "base/trace.hh" 36#include "dev/isa_fake.hh" 37#include "mem/packet.hh" 38#include "mem/packet_access.hh" | 1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 22 unchanged lines hidden (view full) --- 31/** @file 32 * Isa Fake Device implementation 33 */ 34 35#include "base/trace.hh" 36#include "dev/isa_fake.hh" 37#include "mem/packet.hh" 38#include "mem/packet_access.hh" |
39#include "sim/builder.hh" | |
40#include "sim/system.hh" 41 42using namespace std; 43 44IsaFake::IsaFake(Params *p) 45 : BasicPioDevice(p) 46{ | 39#include "sim/system.hh" 40 41using namespace std; 42 43IsaFake::IsaFake(Params *p) 44 : BasicPioDevice(p) 45{ |
47 if (!params()->retBadAddr) | 46 if (!p->ret_bad_addr) |
48 pioSize = p->pio_size; 49 | 47 pioSize = p->pio_size; 48 |
50 retData8 = params()->retData8; 51 retData16 = params()->retData16; 52 retData32 = params()->retData32; 53 retData64 = params()->retData64; | 49 retData8 = p->ret_data8; 50 retData16 = p->ret_data16; 51 retData32 = p->ret_data32; 52 retData64 = p->ret_data64; |
54} 55 56Tick 57IsaFake::read(PacketPtr pkt) 58{ 59 assert(pkt->result == Packet::Unknown); 60 | 53} 54 55Tick 56IsaFake::read(PacketPtr pkt) 57{ 58 assert(pkt->result == Packet::Unknown); 59 |
61 if (params()->warnAccess != "") | 60 if (params()->warn_access != "") |
62 warn("Device %s accessed by read to address %#x size=%d\n", 63 name(), pkt->getAddr(), pkt->getSize()); | 61 warn("Device %s accessed by read to address %#x size=%d\n", 62 name(), pkt->getAddr(), pkt->getSize()); |
64 if (params()->retBadAddr) { | 63 if (params()->ret_bad_addr) { |
65 DPRINTF(Tsunami, "read to bad address va=%#x size=%d\n", 66 pkt->getAddr(), pkt->getSize()); 67 pkt->result = Packet::BadAddress; 68 } else { 69 assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize); 70 DPRINTF(Tsunami, "read va=%#x size=%d\n", 71 pkt->getAddr(), pkt->getSize()); 72 switch (pkt->getSize()) { --- 15 unchanged lines hidden (view full) --- 88 pkt->result = Packet::Success; 89 } 90 return pioDelay; 91} 92 93Tick 94IsaFake::write(PacketPtr pkt) 95{ | 64 DPRINTF(Tsunami, "read to bad address va=%#x size=%d\n", 65 pkt->getAddr(), pkt->getSize()); 66 pkt->result = Packet::BadAddress; 67 } else { 68 assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize); 69 DPRINTF(Tsunami, "read va=%#x size=%d\n", 70 pkt->getAddr(), pkt->getSize()); 71 switch (pkt->getSize()) { --- 15 unchanged lines hidden (view full) --- 87 pkt->result = Packet::Success; 88 } 89 return pioDelay; 90} 91 92Tick 93IsaFake::write(PacketPtr pkt) 94{ |
96 if (params()->warnAccess != "") { | 95 if (params()->warn_access != "") { |
97 uint64_t data; 98 switch (pkt->getSize()) { 99 case sizeof(uint64_t): 100 data = pkt->get<uint64_t>(); 101 break; 102 case sizeof(uint32_t): 103 data = pkt->get<uint32_t>(); 104 break; --- 4 unchanged lines hidden (view full) --- 109 data = pkt->get<uint8_t>(); 110 break; 111 default: 112 panic("invalid access size!\n"); 113 } 114 warn("Device %s accessed by write to address %#x size=%d data=%#x\n", 115 name(), pkt->getAddr(), pkt->getSize(), data); 116 } | 96 uint64_t data; 97 switch (pkt->getSize()) { 98 case sizeof(uint64_t): 99 data = pkt->get<uint64_t>(); 100 break; 101 case sizeof(uint32_t): 102 data = pkt->get<uint32_t>(); 103 break; --- 4 unchanged lines hidden (view full) --- 108 data = pkt->get<uint8_t>(); 109 break; 110 default: 111 panic("invalid access size!\n"); 112 } 113 warn("Device %s accessed by write to address %#x size=%d data=%#x\n", 114 name(), pkt->getAddr(), pkt->getSize(), data); 115 } |
117 if (params()->retBadAddr) { | 116 if (params()->ret_bad_addr) { |
118 DPRINTF(Tsunami, "write to bad address va=%#x size=%d \n", 119 pkt->getAddr(), pkt->getSize()); 120 pkt->result = Packet::BadAddress; 121 } else { 122 DPRINTF(Tsunami, "write - va=%#x size=%d \n", 123 pkt->getAddr(), pkt->getSize()); 124 | 117 DPRINTF(Tsunami, "write to bad address va=%#x size=%d \n", 118 pkt->getAddr(), pkt->getSize()); 119 pkt->result = Packet::BadAddress; 120 } else { 121 DPRINTF(Tsunami, "write - va=%#x size=%d \n", 122 pkt->getAddr(), pkt->getSize()); 123 |
125 if (params()->updateData) { | 124 if (params()->update_data) { |
126 switch (pkt->getSize()) { 127 case sizeof(uint64_t): 128 retData64 = pkt->get<uint64_t>(); 129 break; 130 case sizeof(uint32_t): 131 retData32 = pkt->get<uint32_t>(); 132 break; 133 case sizeof(uint16_t): --- 6 unchanged lines hidden (view full) --- 140 panic("invalid access size!\n"); 141 } 142 } 143 pkt->result = Packet::Success; 144 } 145 return pioDelay; 146} 147 | 125 switch (pkt->getSize()) { 126 case sizeof(uint64_t): 127 retData64 = pkt->get<uint64_t>(); 128 break; 129 case sizeof(uint32_t): 130 retData32 = pkt->get<uint32_t>(); 131 break; 132 case sizeof(uint16_t): --- 6 unchanged lines hidden (view full) --- 139 panic("invalid access size!\n"); 140 } 141 } 142 pkt->result = Packet::Success; 143 } 144 return pioDelay; 145} 146 |
148BEGIN_DECLARE_SIM_OBJECT_PARAMS(IsaFake) 149 150 Param<Addr> pio_addr; 151 Param<Tick> pio_latency; 152 Param<Addr> pio_size; 153 Param<bool> ret_bad_addr; 154 Param<bool> update_data; 155 Param<std::string> warn_access; 156 Param<uint8_t> ret_data8; 157 Param<uint16_t> ret_data16; 158 Param<uint32_t> ret_data32; 159 Param<uint64_t> ret_data64; 160 SimObjectParam<Platform *> platform; 161 SimObjectParam<System *> system; 162 163END_DECLARE_SIM_OBJECT_PARAMS(IsaFake) 164 165BEGIN_INIT_SIM_OBJECT_PARAMS(IsaFake) 166 167 INIT_PARAM(pio_addr, "Device Address"), 168 INIT_PARAM(pio_latency, "Programmed IO latency"), 169 INIT_PARAM(pio_size, "Size of address range"), 170 INIT_PARAM(ret_bad_addr, "Return pkt status BadAddr"), 171 INIT_PARAM(update_data, "Update returned data"), 172 INIT_PARAM(warn_access, "Warn if this device is touched"), 173 INIT_PARAM(ret_data8, "Data to return if not bad addr"), 174 INIT_PARAM(ret_data16, "Data to return if not bad addr"), 175 INIT_PARAM(ret_data32, "Data to return if not bad addr"), 176 INIT_PARAM(ret_data64, "Data to return if not bad addr"), 177 INIT_PARAM(platform, "platform"), 178 INIT_PARAM(system, "system object") 179 180END_INIT_SIM_OBJECT_PARAMS(IsaFake) 181 182CREATE_SIM_OBJECT(IsaFake) | 147IsaFake * 148IsaFakeParams::create() |
183{ | 149{ |
184 IsaFake::Params *p = new IsaFake::Params; 185 p->name = getInstanceName(); 186 p->pio_addr = pio_addr; 187 p->pio_delay = pio_latency; 188 p->pio_size = pio_size; 189 p->retBadAddr = ret_bad_addr; 190 p->updateData = update_data; 191 p->warnAccess = warn_access; 192 p->retData8= ret_data8; 193 p->retData16 = ret_data16; 194 p->retData32 = ret_data32; 195 p->retData64 = ret_data64; 196 p->platform = platform; 197 p->system = system; 198 return new IsaFake(p); | 150 return new IsaFake(this); |
199} | 151} |
200 201REGISTER_SIM_OBJECT("IsaFake", IsaFake) | |