isa_fake.cc (2632:1bb2f91485ea) | isa_fake.cc (2641:6d9d837e2032) |
---|---|
1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 37 unchanged lines hidden (view full) --- 46 : BasicPioDevice(p) 47{ 48 pioSize = p->pio_size; 49} 50 51Tick 52IsaFake::read(Packet *pkt) 53{ | 1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 37 unchanged lines hidden (view full) --- 46 : BasicPioDevice(p) 47{ 48 pioSize = p->pio_size; 49} 50 51Tick 52IsaFake::read(Packet *pkt) 53{ |
54 assert(pkt->result == Unknown); 55 assert(pkt->addr >= pioAddr && pkt->addr < pioAddr + pioSize); | 54 assert(pkt->result == Packet::Unknown); 55 assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize); |
56 57 pkt->time += pioDelay; 58 | 56 57 pkt->time += pioDelay; 58 |
59 DPRINTF(Tsunami, "read va=%#x size=%d\n", pkt->addr, pkt->size); | 59 DPRINTF(Tsunami, "read va=%#x size=%d\n", pkt->getAddr(), pkt->getSize()); |
60 | 60 |
61 switch (pkt->size) { | 61 switch (pkt->getSize()) { |
62 pkt->set(0xFFFFFFFFFFFFFFFFULL); 63 break; 64 case sizeof(uint32_t): 65 pkt->set((uint32_t)0xFFFFFFFF); 66 break; 67 case sizeof(uint16_t): 68 pkt->set((uint16_t)0xFFFF); 69 break; 70 case sizeof(uint8_t): 71 pkt->set((uint8_t)0xFF); 72 break; 73 default: 74 panic("invalid access size(?) for PCI configspace!\n"); 75 } | 62 pkt->set(0xFFFFFFFFFFFFFFFFULL); 63 break; 64 case sizeof(uint32_t): 65 pkt->set((uint32_t)0xFFFFFFFF); 66 break; 67 case sizeof(uint16_t): 68 pkt->set((uint16_t)0xFFFF); 69 break; 70 case sizeof(uint8_t): 71 pkt->set((uint8_t)0xFF); 72 break; 73 default: 74 panic("invalid access size(?) for PCI configspace!\n"); 75 } |
76 pkt->result = Success; | 76 pkt->result = Packet::Success; |
77 return pioDelay; 78} 79 80Tick 81IsaFake::write(Packet *pkt) 82{ 83 pkt->time += pioDelay; | 77 return pioDelay; 78} 79 80Tick 81IsaFake::write(Packet *pkt) 82{ 83 pkt->time += pioDelay; |
84 DPRINTF(Tsunami, "write - va=%#x size=%d \n", pkt->addr, pkt->size); 85 pkt->result = Success; | 84 DPRINTF(Tsunami, "write - va=%#x size=%d \n", pkt->getAddr(), pkt->getSize()); 85 pkt->result = Packet::Success; |
86 return pioDelay; 87} 88 89BEGIN_DECLARE_SIM_OBJECT_PARAMS(IsaFake) 90 91 Param<Addr> pio_addr; 92 Param<Tick> pio_latency; 93 Param<Addr> pio_size; --- 28 unchanged lines hidden --- | 86 return pioDelay; 87} 88 89BEGIN_DECLARE_SIM_OBJECT_PARAMS(IsaFake) 90 91 Param<Addr> pio_addr; 92 Param<Tick> pio_latency; 93 Param<Addr> pio_size; --- 28 unchanged lines hidden --- |