1/*
2 * Copyright (c) 2009 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2004-2005 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Ali Saidi
41 */
42
43/** @file
44 * Implementation of RealView platform.
45 */
46
47#include <deque>
48#include <string>
49#include <vector>
50
51#include "config/the_isa.hh"
52#include "cpu/intr_control.hh"
| 1/*
2 * Copyright (c) 2009 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2004-2005 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Ali Saidi
41 */
42
43/** @file
44 * Implementation of RealView platform.
45 */
46
47#include <deque>
48#include <string>
49#include <vector>
50
51#include "config/the_isa.hh"
52#include "cpu/intr_control.hh"
|
| 53#include "dev/arm/gic.hh"
|
53#include "dev/arm/realview.hh"
54#include "dev/terminal.hh"
55#include "sim/system.hh"
56
57using namespace std;
58using namespace TheISA;
59
60RealView::RealView(const Params *p)
61 : Platform(p), system(p->system)
62{
63 // set the back pointer from the system to myself
64 system->platform = this;
65}
66
67Tick
68RealView::intrFrequency()
69{
70 panic("Need implementation\n");
71 M5_DUMMY_RETURN
72}
73
74void
75RealView::postConsoleInt()
76{
77 warn_once("Don't know what interrupt to post for console.\n");
78 //panic("Need implementation\n");
79}
80
81void
82RealView::clearConsoleInt()
83{
84 warn_once("Don't know what interrupt to clear for console.\n");
85 //panic("Need implementation\n");
86}
87
88void
89RealView::postPciInt(int line)
90{
| 54#include "dev/arm/realview.hh"
55#include "dev/terminal.hh"
56#include "sim/system.hh"
57
58using namespace std;
59using namespace TheISA;
60
61RealView::RealView(const Params *p)
62 : Platform(p), system(p->system)
63{
64 // set the back pointer from the system to myself
65 system->platform = this;
66}
67
68Tick
69RealView::intrFrequency()
70{
71 panic("Need implementation\n");
72 M5_DUMMY_RETURN
73}
74
75void
76RealView::postConsoleInt()
77{
78 warn_once("Don't know what interrupt to post for console.\n");
79 //panic("Need implementation\n");
80}
81
82void
83RealView::clearConsoleInt()
84{
85 warn_once("Don't know what interrupt to clear for console.\n");
86 //panic("Need implementation\n");
87}
88
89void
90RealView::postPciInt(int line)
91{
|
91 panic("Need implementation\n");
| 92 gic->sendInt(line);
|
92}
93
94void
95RealView::clearPciInt(int line)
96{
| 93}
94
95void
96RealView::clearPciInt(int line)
97{
|
97 panic("Need implementation\n");
| 98 gic->clearInt(line);
|
98}
99
100Addr
101RealView::pciToDma(Addr pciAddr) const
102{
| 99}
100
101Addr
102RealView::pciToDma(Addr pciAddr) const
103{
|
103 panic("Need implementation\n");
104 M5_DUMMY_RETURN
| 104 return pciAddr;
|
105}
106
107
108Addr
109RealView::calcPciConfigAddr(int bus, int dev, int func)
110{
| 105}
106
107
108Addr
109RealView::calcPciConfigAddr(int bus, int dev, int func)
110{
|
111 return ULL(-1);
| 111 if (bus != 0)
112 return ULL(-1);
113 return params()->pci_cfg_base | ((func & 7) << 16) | ((dev & 0x1f) << 19);
|
112}
113
114Addr
115RealView::calcPciIOAddr(Addr addr)
116{
117 return addr;
118}
119
120Addr
121RealView::calcPciMemAddr(Addr addr)
122{
| 114}
115
116Addr
117RealView::calcPciIOAddr(Addr addr)
118{
119 return addr;
120}
121
122Addr
123RealView::calcPciMemAddr(Addr addr)
124{
|
123 panic("Need implementation\n");
124 M5_DUMMY_RETURN
| 125 return addr;
|
125}
126
127RealView *
128RealViewParams::create()
129{
130 return new RealView(this);
131}
| 126}
127
128RealView *
129RealViewParams::create()
130{
131 return new RealView(this);
132}
|