1/*
2 * Copyright (c) 2019 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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224 }
225 }
226
227 inline bool nsAccessToSecInt(uint32_t int_id, bool is_secure_access) const
228 {
229 return !DS && !is_secure_access && getIntGroup(int_id) != Gicv3::G1NS;
230 }
231
232 void reset();
233 void serialize(CheckpointOut & cp) const override;
234 void unserialize(CheckpointIn & cp) override;
235 void update();
236 Gicv3CPUInterface* route(uint32_t int_id);
237
238 public:
239
240 Gicv3Distributor(Gicv3 * gic, uint32_t it_lines);
241
242 void deassertSPI(uint32_t int_id);
243 void clearIrqCpuInterface(uint32_t int_id);
244 void init();
245 void initState();
246 uint64_t read(Addr addr, size_t size, bool is_secure_access);
247 void sendInt(uint32_t int_id);
248 void write(Addr addr, uint64_t data, size_t size,
249 bool is_secure_access);
250};
251
252#endif //__DEV_ARM_GICV3_DISTRIBUTOR_H__