gic_v2m.cc (10749:ac3611ba911c) gic_v2m.cc (13230:2988dc5d1d6f)
1/*
2 * Copyright (c) 2013 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 100 unchanged lines hidden (view full) ---

109 int frame = frameFromAddr(pkt->getAddr());
110
111 assert(frame >= 0);
112
113 Addr offset = pkt->getAddr() - frames[frame]->addr;
114
115 switch (offset) {
116 case MSI_TYPER:
1/*
2 * Copyright (c) 2013 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 100 unchanged lines hidden (view full) ---

109 int frame = frameFromAddr(pkt->getAddr());
110
111 assert(frame >= 0);
112
113 Addr offset = pkt->getAddr() - frames[frame]->addr;
114
115 switch (offset) {
116 case MSI_TYPER:
117 pkt->set((frames[frame]->spi_base << 16) |
117 pkt->setLE<uint32_t>((frames[frame]->spi_base << 16) |
118 frames[frame]->spi_len);
119 break;
120
121 case PER_ID4:
118 frames[frame]->spi_len);
119 break;
120
121 case PER_ID4:
122 pkt->set(0x4 | ((4+log2framenum) << 4));
122 pkt->setLE<uint32_t>(0x4 | ((4+log2framenum) << 4));
123 // Nr of 4KB blocks used by component. This is messy as frames are 64K
124 // (16, ie 2^4) and we should assert we're given a Po2 number of frames.
125 break;
126 default:
127 DPRINTF(GICV2M, "GICv2m: Read of unk reg %#x\n", offset);
123 // Nr of 4KB blocks used by component. This is messy as frames are 64K
124 // (16, ie 2^4) and we should assert we're given a Po2 number of frames.
125 break;
126 default:
127 DPRINTF(GICV2M, "GICv2m: Read of unk reg %#x\n", offset);
128 pkt->set(0);
128 pkt->setLE<uint32_t>(0);
129 };
130
131 pkt->makeAtomicResponse();
132
133 return pioDelay;
134}
135
136Tick
137Gicv2m::write(PacketPtr pkt)
138{
139 int frame = frameFromAddr(pkt->getAddr());
140
141 assert(frame >= 0);
142
143 Addr offset = pkt->getAddr() - frames[frame]->addr;
144
145 if (offset == MSI_SETSPI_NSR) {
146 /* Is payload SPI number within range? */
129 };
130
131 pkt->makeAtomicResponse();
132
133 return pioDelay;
134}
135
136Tick
137Gicv2m::write(PacketPtr pkt)
138{
139 int frame = frameFromAddr(pkt->getAddr());
140
141 assert(frame >= 0);
142
143 Addr offset = pkt->getAddr() - frames[frame]->addr;
144
145 if (offset == MSI_SETSPI_NSR) {
146 /* Is payload SPI number within range? */
147 uint32_t m = pkt->get();
147 uint32_t m = pkt->getLE<uint32_t>();
148 if (m >= frames[frame]->spi_base &&
149 m < (frames[frame]->spi_base + frames[frame]->spi_len)) {
150 DPRINTF(GICV2M, "GICv2m: Frame %d raising MSI %d\n", frame, m);
151 gic->sendInt(m);
152 }
153 } else {
154 DPRINTF(GICV2M, "GICv2m: Write of unk reg %#x\n", offset);
155 }

--- 15 unchanged lines hidden --- 		148 if (m >= frames[frame]->spi_base &&
149 m < (frames[frame]->spi_base + frames[frame]->spi_len)) {
150 DPRINTF(GICV2M, "GICv2m: Frame %d raising MSI %d\n", frame, m);
151 gic->sendInt(m);
152 }
153 } else {
154 DPRINTF(GICV2M, "GICv2m: Write of unk reg %#x\n", offset);
155 }

--- 15 unchanged lines hidden ---