1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 18 unchanged lines hidden (view full) --- 27 * 28 * Authors: Ali Saidi 29 * Andrew Schultz 30 */ 31 32/** @file 33 * Tsunami PChip (pci) 34 */ |
35#include "dev/alpha/tsunami_pchip.hh" |
36 37#include <deque> 38#include <string> 39#include <vector> 40 41#include "base/trace.hh" 42#include "config/the_isa.hh" 43#include "debug/Tsunami.hh" 44#include "dev/alpha/tsunami.hh" |
45#include "dev/alpha/tsunami_cchip.hh" |
46#include "dev/alpha/tsunamireg.h" |
47#include "dev/pcidev.hh" |
48#include "mem/packet.hh" 49#include "mem/packet_access.hh" 50#include "sim/system.hh" 51 52using namespace std; 53//Should this be AlphaISA? 54using namespace TheISA; 55 56TsunamiPChip::TsunamiPChip(const Params *p) |
57 : GenericPciHost(p), 58 pioRange(RangeSize(p->pio_addr, 0x1000)), 59 pioDelay(p->pio_latency) |
60{ 61 for (int i = 0; i < 4; i++) { 62 wsba[i] = 0; 63 wsm[i] = 0; 64 tba[i] = 0; 65 } 66 67 // initialize pchip control register 68 pctl = (ULL(0x1) << 20) | (ULL(0x1) << 32) | (ULL(0x2) << 36); 69 70 //Set back pointer in tsunami 71 p->tsunami->pchip = this; 72} 73 74Tick 75TsunamiPChip::read(PacketPtr pkt) 76{ |
77 // We only need to handle our own configuration registers, pass 78 // unknown addresses to the generic code. 79 if (!pioRange.contains(pkt->getAddr())) 80 return GenericPciHost::read(pkt); |
81 |
82 Addr daddr = (pkt->getAddr() - pioRange.start()) >> 6;; |
83 assert(pkt->getSize() == sizeof(uint64_t)); 84 85 86 DPRINTF(Tsunami, "read va=%#x size=%d\n", pkt->getAddr(), pkt->getSize()); 87 88 switch(daddr) { 89 case TSDEV_PC_WSBA0: 90 pkt->set(wsba[0]); --- 53 unchanged lines hidden (view full) --- 144 break; 145 case TSDEV_PC_PMONCTL: 146 panic("PC_PMONCTL not implemented\n"); 147 case TSDEV_PC_PMONCNT: 148 panic("PC_PMONCTN not implemented\n"); 149 default: 150 panic("Default in PChip Read reached reading 0x%x\n", daddr); 151 } |
152 |
153 pkt->makeAtomicResponse(); 154 return pioDelay; 155 156} 157 158Tick 159TsunamiPChip::write(PacketPtr pkt) 160{ |
161 // We only need to handle our own configuration registers, pass 162 // unknown addresses to the generic code. 163 if (!pioRange.contains(pkt->getAddr())) 164 return GenericPciHost::write(pkt); |
165 |
166 Addr daddr = (pkt->getAddr() - pioRange.start()) >> 6; 167 |
168 assert(pkt->getSize() == sizeof(uint64_t)); 169 170 DPRINTF(Tsunami, "write - va=%#x size=%d \n", pkt->getAddr(), pkt->getSize()); 171 172 switch(daddr) { 173 case TSDEV_PC_WSBA0: 174 wsba[0] = pkt->get<uint64_t>(); 175 break; --- 55 unchanged lines hidden (view full) --- 231 panic("Default in PChip write reached reading 0x%x\n", daddr); 232 233 } // uint64_t 234 235 pkt->makeAtomicResponse(); 236 return pioDelay; 237} 238 |
239 240AddrRangeList 241TsunamiPChip::getAddrRanges() const 242{ 243 return AddrRangeList({ 244 RangeSize(confBase, confSize), 245 pioRange 246 }); 247} 248 249 |
250#define DMA_ADDR_MASK ULL(0x3ffffffff) 251 252Addr |
253TsunamiPChip::dmaAddr(const PciBusAddr &dev, Addr busAddr) const |
254{ 255 // compare the address to the window base registers 256 uint64_t tbaMask = 0; 257 uint64_t baMask = 0; 258 259 uint64_t windowMask = 0; 260 uint64_t windowBase = 0; 261 --- 57 unchanged lines hidden (view full) --- 319 } 320 } 321 } 322 323 // if no match was found, then return the original address 324 return busAddr; 325} 326 |
327void 328TsunamiPChip::serialize(CheckpointOut &cp) const 329{ 330 SERIALIZE_SCALAR(pctl); 331 SERIALIZE_ARRAY(wsba, 4); 332 SERIALIZE_ARRAY(wsm, 4); 333 SERIALIZE_ARRAY(tba, 4); 334} --- 16 unchanged lines hidden --- |