1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Ali Saidi 29 * Andrew Schultz 30 * Miguel Serrano 31 */ 32 33/** @file 34 * Tsunami I/O Space mapping including RTC/timer interrupts 35 */ 36 37#ifndef __DEV_TSUNAMI_IO_HH__ 38#define __DEV_TSUNAMI_IO_HH__ 39
| 1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Ali Saidi 29 * Andrew Schultz 30 * Miguel Serrano 31 */ 32 33/** @file 34 * Tsunami I/O Space mapping including RTC/timer interrupts 35 */ 36 37#ifndef __DEV_TSUNAMI_IO_HH__ 38#define __DEV_TSUNAMI_IO_HH__ 39
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40#include "dev/io_device.hh"
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41#include "base/range.hh" 42#include "dev/alpha/tsunami.hh"
| 40#include "base/range.hh" 41#include "dev/alpha/tsunami.hh"
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| 42#include "dev/io_device.hh" 43#include "params/TsunamiIO.hh"
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43#include "sim/eventq.hh" 44 45/** 46 * Tsunami I/O device is a catch all for all the south bridge stuff we care 47 * to implement. 48 */ 49class TsunamiIO : public BasicPioDevice 50{ 51 private: 52 struct tm tm; 53 54 protected: 55 /** Real-Time Clock (MC146818) */ 56 class RTC 57 { 58 private: 59 /** Event for RTC periodic interrupt */ 60 struct RTCEvent : public Event 61 { 62 /** A pointer back to tsunami to create interrupt the processor. */ 63 Tsunami* tsunami; 64 Tick interval; 65 66 RTCEvent(Tsunami* t, Tick i); 67 68 /** Schedule the RTC periodic interrupt */ 69 void scheduleIntr(); 70 71 /** Event process to occur at interrupt*/ 72 virtual void process(); 73 74 /** Event description */ 75 virtual const char *description(); 76 }; 77 78 private: 79 std::string _name; 80 const std::string &name() const { return _name; } 81 82 /** RTC periodic interrupt event */ 83 RTCEvent event; 84 85 /** Current RTC register address/index */ 86 int addr; 87
| 44#include "sim/eventq.hh" 45 46/** 47 * Tsunami I/O device is a catch all for all the south bridge stuff we care 48 * to implement. 49 */ 50class TsunamiIO : public BasicPioDevice 51{ 52 private: 53 struct tm tm; 54 55 protected: 56 /** Real-Time Clock (MC146818) */ 57 class RTC 58 { 59 private: 60 /** Event for RTC periodic interrupt */ 61 struct RTCEvent : public Event 62 { 63 /** A pointer back to tsunami to create interrupt the processor. */ 64 Tsunami* tsunami; 65 Tick interval; 66 67 RTCEvent(Tsunami* t, Tick i); 68 69 /** Schedule the RTC periodic interrupt */ 70 void scheduleIntr(); 71 72 /** Event process to occur at interrupt*/ 73 virtual void process(); 74 75 /** Event description */ 76 virtual const char *description(); 77 }; 78 79 private: 80 std::string _name; 81 const std::string &name() const { return _name; } 82 83 /** RTC periodic interrupt event */ 84 RTCEvent event; 85 86 /** Current RTC register address/index */ 87 int addr; 88
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88 /** should the year be interpreted as BCD? */ 89 bool year_is_bcd; 90
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91 /** Data for real-time clock function */ 92 union { 93 uint8_t clock_data[10]; 94 95 struct { 96 uint8_t sec; 97 uint8_t sec_alrm; 98 uint8_t min; 99 uint8_t min_alrm; 100 uint8_t hour; 101 uint8_t hour_alrm; 102 uint8_t wday; 103 uint8_t mday; 104 uint8_t mon; 105 uint8_t year; 106 }; 107 }; 108 109 /** RTC status register A */ 110 uint8_t stat_regA; 111 112 /** RTC status register B */ 113 uint8_t stat_regB; 114 115 public: 116 RTC(const std::string &name, Tsunami* tsunami,
| 89 /** Data for real-time clock function */ 90 union { 91 uint8_t clock_data[10]; 92 93 struct { 94 uint8_t sec; 95 uint8_t sec_alrm; 96 uint8_t min; 97 uint8_t min_alrm; 98 uint8_t hour; 99 uint8_t hour_alrm; 100 uint8_t wday; 101 uint8_t mday; 102 uint8_t mon; 103 uint8_t year; 104 }; 105 }; 106 107 /** RTC status register A */ 108 uint8_t stat_regA; 109 110 /** RTC status register B */ 111 uint8_t stat_regB; 112 113 public: 114 RTC(const std::string &name, Tsunami* tsunami,
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117 const std::vector<int> &t, bool bcd, Tick i);
| 115 const TsunamiIOParams *params);
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118 119 /** RTC address port: write address of RTC RAM data to access */ 120 void writeAddr(const uint8_t data); 121 122 /** RTC write data */ 123 void writeData(const uint8_t data); 124 125 /** RTC read data */ 126 uint8_t readData(); 127 128 /** 129 * Serialize this object to the given output stream. 130 * @param base The base name of the counter object. 131 * @param os The stream to serialize to. 132 */ 133 void serialize(const std::string &base, std::ostream &os); 134 135 /** 136 * Reconstruct the state of this object from a checkpoint. 137 * @param base The base name of the counter object. 138 * @param cp The checkpoint use. 139 * @param section The section name of this object 140 */ 141 void unserialize(const std::string &base, Checkpoint *cp, 142 const std::string §ion); 143 }; 144 145 /** Programmable Interval Timer (Intel 8254) */ 146 class PITimer 147 { 148 /** Counter element for PIT */ 149 class Counter 150 { 151 /** Event for counter interrupt */ 152 class CounterEvent : public Event 153 { 154 private: 155 /** Pointer back to Counter */ 156 Counter* counter; 157 Tick interval; 158 159 public: 160 CounterEvent(Counter*); 161 162 /** Event process */ 163 virtual void process(); 164 165 /** Event description */ 166 virtual const char *description(); 167 168 friend class Counter; 169 }; 170 171 private: 172 std::string _name; 173 const std::string &name() const { return _name; } 174 175 CounterEvent event; 176 177 /** Current count value */ 178 uint16_t count; 179 180 /** Latched count */ 181 uint16_t latched_count; 182 183 /** Interrupt period */ 184 uint16_t period; 185 186 /** Current mode of operation */ 187 uint8_t mode; 188 189 /** Output goes high when the counter reaches zero */ 190 bool output_high; 191 192 /** State of the count latch */ 193 bool latch_on; 194 195 /** Set of values for read_byte and write_byte */ 196 enum {LSB, MSB}; 197 198 /** Determine which byte of a 16-bit count value to read/write */ 199 uint8_t read_byte, write_byte; 200 201 public: 202 Counter(const std::string &name); 203 204 /** Latch the current count (if one is not already latched) */ 205 void latchCount(); 206 207 /** Set the read/write mode */ 208 void setRW(int rw_val); 209 210 /** Set operational mode */ 211 void setMode(int mode_val); 212 213 /** Set count encoding */ 214 void setBCD(int bcd_val); 215 216 /** Read a count byte */ 217 uint8_t read(); 218 219 /** Write a count byte */ 220 void write(const uint8_t data); 221 222 /** Is the output high? */ 223 bool outputHigh(); 224 225 /** 226 * Serialize this object to the given output stream. 227 * @param base The base name of the counter object. 228 * @param os The stream to serialize to. 229 */ 230 void serialize(const std::string &base, std::ostream &os); 231 232 /** 233 * Reconstruct the state of this object from a checkpoint. 234 * @param base The base name of the counter object. 235 * @param cp The checkpoint use. 236 * @param section The section name of this object 237 */ 238 void unserialize(const std::string &base, Checkpoint *cp, 239 const std::string §ion); 240 }; 241 242 private: 243 std::string _name; 244 const std::string &name() const { return _name; } 245 246 /** PIT has three seperate counters */ 247 Counter *counter[3]; 248 249 public: 250 /** Public way to access individual counters (avoid array accesses) */ 251 Counter counter0; 252 Counter counter1; 253 Counter counter2; 254 255 PITimer(const std::string &name); 256 257 /** Write control word */ 258 void writeControl(const uint8_t data); 259 260 /** 261 * Serialize this object to the given output stream. 262 * @param base The base name of the counter object. 263 * @param os The stream to serialize to. 264 */ 265 void serialize(const std::string &base, std::ostream &os); 266 267 /** 268 * Reconstruct the state of this object from a checkpoint. 269 * @param base The base name of the counter object. 270 * @param cp The checkpoint use. 271 * @param section The section name of this object 272 */ 273 void unserialize(const std::string &base, Checkpoint *cp, 274 const std::string §ion); 275 }; 276 277 /** Mask of the PIC1 */ 278 uint8_t mask1; 279 280 /** Mask of the PIC2 */ 281 uint8_t mask2; 282 283 /** Mode of PIC1. Not used for anything */ 284 uint8_t mode1; 285 286 /** Mode of PIC2. Not used for anything */ 287 uint8_t mode2; 288 289 /** Raw PIC interrupt register before masking */ 290 uint8_t picr; //Raw PIC interrput register 291 292 /** Is the pic interrupting right now or not. */ 293 bool picInterrupting; 294 295 /** A pointer to the Tsunami device which be belong to */ 296 Tsunami *tsunami; 297 298 /** Intel 8253 Periodic Interval Timer */ 299 PITimer pitimer; 300 301 RTC rtc; 302 303 /** The interval is set via two writes to the PIT. 304 * This variable contains a flag as to how many writes have happened, and 305 * the time so far. 306 */ 307 uint16_t timerData; 308 309 public: 310 /** 311 * Return the freqency of the RTC 312 * @return interrupt rate of the RTC 313 */ 314 Tick frequency() const; 315
| 116 117 /** RTC address port: write address of RTC RAM data to access */ 118 void writeAddr(const uint8_t data); 119 120 /** RTC write data */ 121 void writeData(const uint8_t data); 122 123 /** RTC read data */ 124 uint8_t readData(); 125 126 /** 127 * Serialize this object to the given output stream. 128 * @param base The base name of the counter object. 129 * @param os The stream to serialize to. 130 */ 131 void serialize(const std::string &base, std::ostream &os); 132 133 /** 134 * Reconstruct the state of this object from a checkpoint. 135 * @param base The base name of the counter object. 136 * @param cp The checkpoint use. 137 * @param section The section name of this object 138 */ 139 void unserialize(const std::string &base, Checkpoint *cp, 140 const std::string §ion); 141 }; 142 143 /** Programmable Interval Timer (Intel 8254) */ 144 class PITimer 145 { 146 /** Counter element for PIT */ 147 class Counter 148 { 149 /** Event for counter interrupt */ 150 class CounterEvent : public Event 151 { 152 private: 153 /** Pointer back to Counter */ 154 Counter* counter; 155 Tick interval; 156 157 public: 158 CounterEvent(Counter*); 159 160 /** Event process */ 161 virtual void process(); 162 163 /** Event description */ 164 virtual const char *description(); 165 166 friend class Counter; 167 }; 168 169 private: 170 std::string _name; 171 const std::string &name() const { return _name; } 172 173 CounterEvent event; 174 175 /** Current count value */ 176 uint16_t count; 177 178 /** Latched count */ 179 uint16_t latched_count; 180 181 /** Interrupt period */ 182 uint16_t period; 183 184 /** Current mode of operation */ 185 uint8_t mode; 186 187 /** Output goes high when the counter reaches zero */ 188 bool output_high; 189 190 /** State of the count latch */ 191 bool latch_on; 192 193 /** Set of values for read_byte and write_byte */ 194 enum {LSB, MSB}; 195 196 /** Determine which byte of a 16-bit count value to read/write */ 197 uint8_t read_byte, write_byte; 198 199 public: 200 Counter(const std::string &name); 201 202 /** Latch the current count (if one is not already latched) */ 203 void latchCount(); 204 205 /** Set the read/write mode */ 206 void setRW(int rw_val); 207 208 /** Set operational mode */ 209 void setMode(int mode_val); 210 211 /** Set count encoding */ 212 void setBCD(int bcd_val); 213 214 /** Read a count byte */ 215 uint8_t read(); 216 217 /** Write a count byte */ 218 void write(const uint8_t data); 219 220 /** Is the output high? */ 221 bool outputHigh(); 222 223 /** 224 * Serialize this object to the given output stream. 225 * @param base The base name of the counter object. 226 * @param os The stream to serialize to. 227 */ 228 void serialize(const std::string &base, std::ostream &os); 229 230 /** 231 * Reconstruct the state of this object from a checkpoint. 232 * @param base The base name of the counter object. 233 * @param cp The checkpoint use. 234 * @param section The section name of this object 235 */ 236 void unserialize(const std::string &base, Checkpoint *cp, 237 const std::string §ion); 238 }; 239 240 private: 241 std::string _name; 242 const std::string &name() const { return _name; } 243 244 /** PIT has three seperate counters */ 245 Counter *counter[3]; 246 247 public: 248 /** Public way to access individual counters (avoid array accesses) */ 249 Counter counter0; 250 Counter counter1; 251 Counter counter2; 252 253 PITimer(const std::string &name); 254 255 /** Write control word */ 256 void writeControl(const uint8_t data); 257 258 /** 259 * Serialize this object to the given output stream. 260 * @param base The base name of the counter object. 261 * @param os The stream to serialize to. 262 */ 263 void serialize(const std::string &base, std::ostream &os); 264 265 /** 266 * Reconstruct the state of this object from a checkpoint. 267 * @param base The base name of the counter object. 268 * @param cp The checkpoint use. 269 * @param section The section name of this object 270 */ 271 void unserialize(const std::string &base, Checkpoint *cp, 272 const std::string §ion); 273 }; 274 275 /** Mask of the PIC1 */ 276 uint8_t mask1; 277 278 /** Mask of the PIC2 */ 279 uint8_t mask2; 280 281 /** Mode of PIC1. Not used for anything */ 282 uint8_t mode1; 283 284 /** Mode of PIC2. Not used for anything */ 285 uint8_t mode2; 286 287 /** Raw PIC interrupt register before masking */ 288 uint8_t picr; //Raw PIC interrput register 289 290 /** Is the pic interrupting right now or not. */ 291 bool picInterrupting; 292 293 /** A pointer to the Tsunami device which be belong to */ 294 Tsunami *tsunami; 295 296 /** Intel 8253 Periodic Interval Timer */ 297 PITimer pitimer; 298 299 RTC rtc; 300 301 /** The interval is set via two writes to the PIT. 302 * This variable contains a flag as to how many writes have happened, and 303 * the time so far. 304 */ 305 uint16_t timerData; 306 307 public: 308 /** 309 * Return the freqency of the RTC 310 * @return interrupt rate of the RTC 311 */ 312 Tick frequency() const; 313
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316 struct Params : public BasicPioDevice::Params 317 { 318 Tick frequency; 319 Tsunami *tsunami; 320 std::vector<int> init_time; 321 bool year_is_bcd; 322 }; 323 324 protected: 325 const Params *params() const { return (const Params*)_params; } 326
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327 public:
| 314 public:
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| 315 typedef TsunamiIOParams Params;
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328 /** 329 * Initialize all the data for devices supported by Tsunami I/O. 330 * @param p pointer to Params struct 331 */
| 316 /** 317 * Initialize all the data for devices supported by Tsunami I/O. 318 * @param p pointer to Params struct 319 */
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332 TsunamiIO(Params *p);
| 320 TsunamiIO(const Params *p);
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333
| 321
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| 322 const Params * 323 params() const 324 { 325 return dynamic_cast<const Params *>(_params); 326 } 327
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334 virtual Tick read(PacketPtr pkt); 335 virtual Tick write(PacketPtr pkt); 336 337 /** 338 * Post an PIC interrupt to the CPU via the CChip 339 * @param bitvector interrupt to post. 340 */ 341 void postPIC(uint8_t bitvector); 342 343 /** 344 * Clear a posted interrupt 345 * @param bitvector interrupt to clear 346 */ 347 void clearPIC(uint8_t bitvector); 348 349 /** 350 * Serialize this object to the given output stream. 351 * @param os The stream to serialize to. 352 */ 353 virtual void serialize(std::ostream &os); 354 355 /** 356 * Reconstruct the state of this object from a checkpoint. 357 * @param cp The checkpoint use. 358 * @param section The section name of this object 359 */ 360 virtual void unserialize(Checkpoint *cp, const std::string §ion); 361 362}; 363 364#endif // __DEV_TSUNAMI_IO_HH__
| 328 virtual Tick read(PacketPtr pkt); 329 virtual Tick write(PacketPtr pkt); 330 331 /** 332 * Post an PIC interrupt to the CPU via the CChip 333 * @param bitvector interrupt to post. 334 */ 335 void postPIC(uint8_t bitvector); 336 337 /** 338 * Clear a posted interrupt 339 * @param bitvector interrupt to clear 340 */ 341 void clearPIC(uint8_t bitvector); 342 343 /** 344 * Serialize this object to the given output stream. 345 * @param os The stream to serialize to. 346 */ 347 virtual void serialize(std::ostream &os); 348 349 /** 350 * Reconstruct the state of this object from a checkpoint. 351 * @param cp The checkpoint use. 352 * @param section The section name of this object 353 */ 354 virtual void unserialize(Checkpoint *cp, const std::string §ion); 355 356}; 357 358#endif // __DEV_TSUNAMI_IO_HH__
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