1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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34 * Tsunami I/O Space mapping including RTC/timer interrupts
35 */
36
37#ifndef __DEV_TSUNAMI_IO_HH__
38#define __DEV_TSUNAMI_IO_HH__
39
40#include "base/range.hh"
41#include "dev/alpha/tsunami.hh"
42#include "dev/mc146818.hh"
43#include "dev/io_device.hh"
44#include "params/TsunamiIO.hh"
45#include "sim/eventq.hh"
46
47/**
48 * Tsunami I/O device is a catch all for all the south bridge stuff we care
49 * to implement.
50 */
51class TsunamiIO : public BasicPioDevice
52{
53 private:
54 struct tm tm;
55
56 protected:
57
58 class TsunamiRTC : public MC146818
59 {
60 public:
61 Tsunami * tsunami;
62 TsunamiRTC(const std::string &n, const TsunamiIOParams *p);
63
64 protected:
65 void handleEvent()
66 {
67 //Actually interrupt the processor here
68 tsunami->cchip->postRTC();
69 }
70 };
71
72 /** Programmable Interval Timer (Intel 8254) */
73 class PITimer
74 {
75 /** Counter element for PIT */
76 class Counter
77 {

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220 bool picInterrupting;
221
222 /** A pointer to the Tsunami device which be belong to */
223 Tsunami *tsunami;
224
225 /** Intel 8253 Periodic Interval Timer */
226 PITimer pitimer;
227
228 TsunamiRTC rtc;
229
230 uint8_t rtcAddr;
231
232 /** The interval is set via two writes to the PIT.
233 * This variable contains a flag as to how many writes have happened, and
234 * the time so far.
235 */
236 uint16_t timerData;
237
238 public:
239 /**

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