backdoor.cc (8741:491297d019f3) backdoor.cc (8789:a8b63a0ee14c)
1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Nathan Binkert
29 * Ali Saidi
30 * Steve Reinhardt
31 * Erik Hallnor
32 */
33
34/** @file
35 * Alpha Console Backdoor Definition
36 */
37
38#include <cstddef>
39#include <string>
40
1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Nathan Binkert
29 * Ali Saidi
30 * Steve Reinhardt
31 * Erik Hallnor
32 */
33
34/** @file
35 * Alpha Console Backdoor Definition
36 */
37
38#include <cstddef>
39#include <string>
40
41#include "config/full_system.hh"
42
43#if FULL_SYSTEM //XXX No AlphaSystem in SE mode.
44#include "arch/alpha/system.hh"
41#include "arch/alpha/system.hh"
45#endif
46#include "base/inifile.hh"
47#include "base/str.hh"
48#include "base/trace.hh"
49#include "cpu/base.hh"
50#include "cpu/thread_context.hh"
51#include "debug/AlphaBackdoor.hh"
52#include "dev/alpha/backdoor.hh"
53#include "dev/alpha/tsunami.hh"
54#include "dev/alpha/tsunami_cchip.hh"
55#include "dev/alpha/tsunami_io.hh"
56#include "dev/platform.hh"
57#include "dev/simple_disk.hh"
58#include "dev/terminal.hh"
59#include "mem/packet.hh"
60#include "mem/packet_access.hh"
61#include "mem/physical.hh"
62#include "params/AlphaBackdoor.hh"
63#include "sim/sim_object.hh"
64
65using namespace std;
66using namespace AlphaISA;
67
68AlphaBackdoor::AlphaBackdoor(const Params *p)
69 : BasicPioDevice(p), disk(p->disk), terminal(p->terminal),
42#include "base/inifile.hh"
43#include "base/str.hh"
44#include "base/trace.hh"
45#include "cpu/base.hh"
46#include "cpu/thread_context.hh"
47#include "debug/AlphaBackdoor.hh"
48#include "dev/alpha/backdoor.hh"
49#include "dev/alpha/tsunami.hh"
50#include "dev/alpha/tsunami_cchip.hh"
51#include "dev/alpha/tsunami_io.hh"
52#include "dev/platform.hh"
53#include "dev/simple_disk.hh"
54#include "dev/terminal.hh"
55#include "mem/packet.hh"
56#include "mem/packet_access.hh"
57#include "mem/physical.hh"
58#include "params/AlphaBackdoor.hh"
59#include "sim/sim_object.hh"
60
61using namespace std;
62using namespace AlphaISA;
63
64AlphaBackdoor::AlphaBackdoor(const Params *p)
65 : BasicPioDevice(p), disk(p->disk), terminal(p->terminal),
70#if FULL_SYSTEM //XXX No system pointer in SE mode.
71 system(p->system),
66 system(p->system),
72#endif
73 cpu(p->cpu)
74{
75
76 pioSize = sizeof(struct AlphaAccess);
77
78 alphaAccess = new Access();
79 alphaAccess->last_offset = pioSize - 1;
80
81 alphaAccess->version = ALPHA_ACCESS_VERSION;
82 alphaAccess->diskUnit = 1;
83
84 alphaAccess->diskCount = 0;
85 alphaAccess->diskPAddr = 0;
86 alphaAccess->diskBlock = 0;
87 alphaAccess->diskOperation = 0;
88 alphaAccess->outputChar = 0;
89 alphaAccess->inputChar = 0;
90 std::memset(alphaAccess->cpuStack, 0, sizeof(alphaAccess->cpuStack));
91
92}
93
94void
95AlphaBackdoor::startup()
96{
67 cpu(p->cpu)
68{
69
70 pioSize = sizeof(struct AlphaAccess);
71
72 alphaAccess = new Access();
73 alphaAccess->last_offset = pioSize - 1;
74
75 alphaAccess->version = ALPHA_ACCESS_VERSION;
76 alphaAccess->diskUnit = 1;
77
78 alphaAccess->diskCount = 0;
79 alphaAccess->diskPAddr = 0;
80 alphaAccess->diskBlock = 0;
81 alphaAccess->diskOperation = 0;
82 alphaAccess->outputChar = 0;
83 alphaAccess->inputChar = 0;
84 std::memset(alphaAccess->cpuStack, 0, sizeof(alphaAccess->cpuStack));
85
86}
87
88void
89AlphaBackdoor::startup()
90{
97#if FULL_SYSTEM //XXX No system pointer in SE mode.
98 system->setAlphaAccess(pioAddr);
99 alphaAccess->numCPUs = system->numContexts();
100 alphaAccess->kernStart = system->getKernelStart();
101 alphaAccess->kernEnd = system->getKernelEnd();
102 alphaAccess->entryPoint = system->getKernelEntry();
103 alphaAccess->mem_size = system->physmem->size();
104 alphaAccess->cpuClock = cpu->frequency() / 1000000; // In MHz
105 Tsunami *tsunami = dynamic_cast<Tsunami *>(params()->platform);
106 assert(tsunami);
107 alphaAccess->intrClockFrequency = tsunami->io->frequency();
91 system->setAlphaAccess(pioAddr);
92 alphaAccess->numCPUs = system->numContexts();
93 alphaAccess->kernStart = system->getKernelStart();
94 alphaAccess->kernEnd = system->getKernelEnd();
95 alphaAccess->entryPoint = system->getKernelEntry();
96 alphaAccess->mem_size = system->physmem->size();
97 alphaAccess->cpuClock = cpu->frequency() / 1000000; // In MHz
98 Tsunami *tsunami = dynamic_cast<Tsunami *>(params()->platform);
99 assert(tsunami);
100 alphaAccess->intrClockFrequency = tsunami->io->frequency();
108#endif
109}
110
111Tick
112AlphaBackdoor::read(PacketPtr pkt)
113{
114
115 /** XXX Do we want to push the addr munging to a bus brige or something? So
116 * the device has it's physical address and then the bridge adds on whatever
117 * machine dependent address swizzle is required?
118 */
119
120 assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
121
122 Addr daddr = pkt->getAddr() - pioAddr;
123
124 pkt->allocate();
125 pkt->makeAtomicResponse();
126
127 switch (pkt->getSize())
128 {
129 case sizeof(uint32_t):
130 switch (daddr)
131 {
132 case offsetof(AlphaAccess, last_offset):
133 pkt->set(alphaAccess->last_offset);
134 break;
135 case offsetof(AlphaAccess, version):
136 pkt->set(alphaAccess->version);
137 break;
138 case offsetof(AlphaAccess, numCPUs):
139 pkt->set(alphaAccess->numCPUs);
140 break;
141 case offsetof(AlphaAccess, intrClockFrequency):
142 pkt->set(alphaAccess->intrClockFrequency);
143 break;
144 default:
145 /* Old console code read in everyting as a 32bit int
146 * we now break that for better error checking.
147 */
148 pkt->setBadAddress();
149 }
150 DPRINTF(AlphaBackdoor, "read: offset=%#x val=%#x\n", daddr,
151 pkt->get<uint32_t>());
152 break;
153 case sizeof(uint64_t):
154 switch (daddr)
155 {
156 case offsetof(AlphaAccess, inputChar):
157 pkt->set(terminal->console_in());
158 break;
159 case offsetof(AlphaAccess, cpuClock):
160 pkt->set(alphaAccess->cpuClock);
161 break;
162 case offsetof(AlphaAccess, mem_size):
163 pkt->set(alphaAccess->mem_size);
164 break;
165 case offsetof(AlphaAccess, kernStart):
166 pkt->set(alphaAccess->kernStart);
167 break;
168 case offsetof(AlphaAccess, kernEnd):
169 pkt->set(alphaAccess->kernEnd);
170 break;
171 case offsetof(AlphaAccess, entryPoint):
172 pkt->set(alphaAccess->entryPoint);
173 break;
174 case offsetof(AlphaAccess, diskUnit):
175 pkt->set(alphaAccess->diskUnit);
176 break;
177 case offsetof(AlphaAccess, diskCount):
178 pkt->set(alphaAccess->diskCount);
179 break;
180 case offsetof(AlphaAccess, diskPAddr):
181 pkt->set(alphaAccess->diskPAddr);
182 break;
183 case offsetof(AlphaAccess, diskBlock):
184 pkt->set(alphaAccess->diskBlock);
185 break;
186 case offsetof(AlphaAccess, diskOperation):
187 pkt->set(alphaAccess->diskOperation);
188 break;
189 case offsetof(AlphaAccess, outputChar):
190 pkt->set(alphaAccess->outputChar);
191 break;
192 default:
193 int cpunum = (daddr - offsetof(AlphaAccess, cpuStack)) /
194 sizeof(alphaAccess->cpuStack[0]);
195
196 if (cpunum >= 0 && cpunum < 64)
197 pkt->set(alphaAccess->cpuStack[cpunum]);
198 else
199 panic("Unknown 64bit access, %#x\n", daddr);
200 }
201 DPRINTF(AlphaBackdoor, "read: offset=%#x val=%#x\n", daddr,
202 pkt->get<uint64_t>());
203 break;
204 default:
205 pkt->setBadAddress();
206 }
207 return pioDelay;
208}
209
210Tick
211AlphaBackdoor::write(PacketPtr pkt)
212{
213 assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
214 Addr daddr = pkt->getAddr() - pioAddr;
215
216 uint64_t val = pkt->get<uint64_t>();
217 assert(pkt->getSize() == sizeof(uint64_t));
218
219 switch (daddr) {
220 case offsetof(AlphaAccess, diskUnit):
221 alphaAccess->diskUnit = val;
222 break;
223
224 case offsetof(AlphaAccess, diskCount):
225 alphaAccess->diskCount = val;
226 break;
227
228 case offsetof(AlphaAccess, diskPAddr):
229 alphaAccess->diskPAddr = val;
230 break;
231
232 case offsetof(AlphaAccess, diskBlock):
233 alphaAccess->diskBlock = val;
234 break;
235
236 case offsetof(AlphaAccess, diskOperation):
237 if (val == 0x13)
238 disk->read(alphaAccess->diskPAddr, alphaAccess->diskBlock,
239 alphaAccess->diskCount);
240 else
241 panic("Invalid disk operation!");
242
243 break;
244
245 case offsetof(AlphaAccess, outputChar):
246 terminal->out((char)(val & 0xff));
247 break;
248
249 default:
250 int cpunum = (daddr - offsetof(AlphaAccess, cpuStack)) /
251 sizeof(alphaAccess->cpuStack[0]);
252 inform("Launching CPU %d @ %d", cpunum, curTick());
253 assert(val > 0 && "Must not access primary cpu");
254 if (cpunum >= 0 && cpunum < 64)
255 alphaAccess->cpuStack[cpunum] = val;
256 else
257 panic("Unknown 64bit access, %#x\n", daddr);
258 }
259
260 pkt->makeAtomicResponse();
261
262 return pioDelay;
263}
264
265void
266AlphaBackdoor::Access::serialize(ostream &os)
267{
268 SERIALIZE_SCALAR(last_offset);
269 SERIALIZE_SCALAR(version);
270 SERIALIZE_SCALAR(numCPUs);
271 SERIALIZE_SCALAR(mem_size);
272 SERIALIZE_SCALAR(cpuClock);
273 SERIALIZE_SCALAR(intrClockFrequency);
274 SERIALIZE_SCALAR(kernStart);
275 SERIALIZE_SCALAR(kernEnd);
276 SERIALIZE_SCALAR(entryPoint);
277 SERIALIZE_SCALAR(diskUnit);
278 SERIALIZE_SCALAR(diskCount);
279 SERIALIZE_SCALAR(diskPAddr);
280 SERIALIZE_SCALAR(diskBlock);
281 SERIALIZE_SCALAR(diskOperation);
282 SERIALIZE_SCALAR(outputChar);
283 SERIALIZE_SCALAR(inputChar);
284 SERIALIZE_ARRAY(cpuStack,64);
285}
286
287void
288AlphaBackdoor::Access::unserialize(Checkpoint *cp, const std::string &section)
289{
290 UNSERIALIZE_SCALAR(last_offset);
291 UNSERIALIZE_SCALAR(version);
292 UNSERIALIZE_SCALAR(numCPUs);
293 UNSERIALIZE_SCALAR(mem_size);
294 UNSERIALIZE_SCALAR(cpuClock);
295 UNSERIALIZE_SCALAR(intrClockFrequency);
296 UNSERIALIZE_SCALAR(kernStart);
297 UNSERIALIZE_SCALAR(kernEnd);
298 UNSERIALIZE_SCALAR(entryPoint);
299 UNSERIALIZE_SCALAR(diskUnit);
300 UNSERIALIZE_SCALAR(diskCount);
301 UNSERIALIZE_SCALAR(diskPAddr);
302 UNSERIALIZE_SCALAR(diskBlock);
303 UNSERIALIZE_SCALAR(diskOperation);
304 UNSERIALIZE_SCALAR(outputChar);
305 UNSERIALIZE_SCALAR(inputChar);
306 UNSERIALIZE_ARRAY(cpuStack, 64);
307}
308
309void
310AlphaBackdoor::serialize(ostream &os)
311{
312 alphaAccess->serialize(os);
313}
314
315void
316AlphaBackdoor::unserialize(Checkpoint *cp, const std::string &section)
317{
318 alphaAccess->unserialize(cp, section);
319}
320
321AlphaBackdoor *
322AlphaBackdoorParams::create()
323{
324 return new AlphaBackdoor(this);
325}
101}
102
103Tick
104AlphaBackdoor::read(PacketPtr pkt)
105{
106
107 /** XXX Do we want to push the addr munging to a bus brige or something? So
108 * the device has it's physical address and then the bridge adds on whatever
109 * machine dependent address swizzle is required?
110 */
111
112 assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
113
114 Addr daddr = pkt->getAddr() - pioAddr;
115
116 pkt->allocate();
117 pkt->makeAtomicResponse();
118
119 switch (pkt->getSize())
120 {
121 case sizeof(uint32_t):
122 switch (daddr)
123 {
124 case offsetof(AlphaAccess, last_offset):
125 pkt->set(alphaAccess->last_offset);
126 break;
127 case offsetof(AlphaAccess, version):
128 pkt->set(alphaAccess->version);
129 break;
130 case offsetof(AlphaAccess, numCPUs):
131 pkt->set(alphaAccess->numCPUs);
132 break;
133 case offsetof(AlphaAccess, intrClockFrequency):
134 pkt->set(alphaAccess->intrClockFrequency);
135 break;
136 default:
137 /* Old console code read in everyting as a 32bit int
138 * we now break that for better error checking.
139 */
140 pkt->setBadAddress();
141 }
142 DPRINTF(AlphaBackdoor, "read: offset=%#x val=%#x\n", daddr,
143 pkt->get<uint32_t>());
144 break;
145 case sizeof(uint64_t):
146 switch (daddr)
147 {
148 case offsetof(AlphaAccess, inputChar):
149 pkt->set(terminal->console_in());
150 break;
151 case offsetof(AlphaAccess, cpuClock):
152 pkt->set(alphaAccess->cpuClock);
153 break;
154 case offsetof(AlphaAccess, mem_size):
155 pkt->set(alphaAccess->mem_size);
156 break;
157 case offsetof(AlphaAccess, kernStart):
158 pkt->set(alphaAccess->kernStart);
159 break;
160 case offsetof(AlphaAccess, kernEnd):
161 pkt->set(alphaAccess->kernEnd);
162 break;
163 case offsetof(AlphaAccess, entryPoint):
164 pkt->set(alphaAccess->entryPoint);
165 break;
166 case offsetof(AlphaAccess, diskUnit):
167 pkt->set(alphaAccess->diskUnit);
168 break;
169 case offsetof(AlphaAccess, diskCount):
170 pkt->set(alphaAccess->diskCount);
171 break;
172 case offsetof(AlphaAccess, diskPAddr):
173 pkt->set(alphaAccess->diskPAddr);
174 break;
175 case offsetof(AlphaAccess, diskBlock):
176 pkt->set(alphaAccess->diskBlock);
177 break;
178 case offsetof(AlphaAccess, diskOperation):
179 pkt->set(alphaAccess->diskOperation);
180 break;
181 case offsetof(AlphaAccess, outputChar):
182 pkt->set(alphaAccess->outputChar);
183 break;
184 default:
185 int cpunum = (daddr - offsetof(AlphaAccess, cpuStack)) /
186 sizeof(alphaAccess->cpuStack[0]);
187
188 if (cpunum >= 0 && cpunum < 64)
189 pkt->set(alphaAccess->cpuStack[cpunum]);
190 else
191 panic("Unknown 64bit access, %#x\n", daddr);
192 }
193 DPRINTF(AlphaBackdoor, "read: offset=%#x val=%#x\n", daddr,
194 pkt->get<uint64_t>());
195 break;
196 default:
197 pkt->setBadAddress();
198 }
199 return pioDelay;
200}
201
202Tick
203AlphaBackdoor::write(PacketPtr pkt)
204{
205 assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
206 Addr daddr = pkt->getAddr() - pioAddr;
207
208 uint64_t val = pkt->get<uint64_t>();
209 assert(pkt->getSize() == sizeof(uint64_t));
210
211 switch (daddr) {
212 case offsetof(AlphaAccess, diskUnit):
213 alphaAccess->diskUnit = val;
214 break;
215
216 case offsetof(AlphaAccess, diskCount):
217 alphaAccess->diskCount = val;
218 break;
219
220 case offsetof(AlphaAccess, diskPAddr):
221 alphaAccess->diskPAddr = val;
222 break;
223
224 case offsetof(AlphaAccess, diskBlock):
225 alphaAccess->diskBlock = val;
226 break;
227
228 case offsetof(AlphaAccess, diskOperation):
229 if (val == 0x13)
230 disk->read(alphaAccess->diskPAddr, alphaAccess->diskBlock,
231 alphaAccess->diskCount);
232 else
233 panic("Invalid disk operation!");
234
235 break;
236
237 case offsetof(AlphaAccess, outputChar):
238 terminal->out((char)(val & 0xff));
239 break;
240
241 default:
242 int cpunum = (daddr - offsetof(AlphaAccess, cpuStack)) /
243 sizeof(alphaAccess->cpuStack[0]);
244 inform("Launching CPU %d @ %d", cpunum, curTick());
245 assert(val > 0 && "Must not access primary cpu");
246 if (cpunum >= 0 && cpunum < 64)
247 alphaAccess->cpuStack[cpunum] = val;
248 else
249 panic("Unknown 64bit access, %#x\n", daddr);
250 }
251
252 pkt->makeAtomicResponse();
253
254 return pioDelay;
255}
256
257void
258AlphaBackdoor::Access::serialize(ostream &os)
259{
260 SERIALIZE_SCALAR(last_offset);
261 SERIALIZE_SCALAR(version);
262 SERIALIZE_SCALAR(numCPUs);
263 SERIALIZE_SCALAR(mem_size);
264 SERIALIZE_SCALAR(cpuClock);
265 SERIALIZE_SCALAR(intrClockFrequency);
266 SERIALIZE_SCALAR(kernStart);
267 SERIALIZE_SCALAR(kernEnd);
268 SERIALIZE_SCALAR(entryPoint);
269 SERIALIZE_SCALAR(diskUnit);
270 SERIALIZE_SCALAR(diskCount);
271 SERIALIZE_SCALAR(diskPAddr);
272 SERIALIZE_SCALAR(diskBlock);
273 SERIALIZE_SCALAR(diskOperation);
274 SERIALIZE_SCALAR(outputChar);
275 SERIALIZE_SCALAR(inputChar);
276 SERIALIZE_ARRAY(cpuStack,64);
277}
278
279void
280AlphaBackdoor::Access::unserialize(Checkpoint *cp, const std::string &section)
281{
282 UNSERIALIZE_SCALAR(last_offset);
283 UNSERIALIZE_SCALAR(version);
284 UNSERIALIZE_SCALAR(numCPUs);
285 UNSERIALIZE_SCALAR(mem_size);
286 UNSERIALIZE_SCALAR(cpuClock);
287 UNSERIALIZE_SCALAR(intrClockFrequency);
288 UNSERIALIZE_SCALAR(kernStart);
289 UNSERIALIZE_SCALAR(kernEnd);
290 UNSERIALIZE_SCALAR(entryPoint);
291 UNSERIALIZE_SCALAR(diskUnit);
292 UNSERIALIZE_SCALAR(diskCount);
293 UNSERIALIZE_SCALAR(diskPAddr);
294 UNSERIALIZE_SCALAR(diskBlock);
295 UNSERIALIZE_SCALAR(diskOperation);
296 UNSERIALIZE_SCALAR(outputChar);
297 UNSERIALIZE_SCALAR(inputChar);
298 UNSERIALIZE_ARRAY(cpuStack, 64);
299}
300
301void
302AlphaBackdoor::serialize(ostream &os)
303{
304 alphaAccess->serialize(os);
305}
306
307void
308AlphaBackdoor::unserialize(Checkpoint *cp, const std::string &section)
309{
310 alphaAccess->unserialize(cp, section);
311}
312
313AlphaBackdoor *
314AlphaBackdoorParams::create()
315{
316 return new AlphaBackdoor(this);
317}