RubyDirectedTester.cc (8922:17f037ad8918) RubyDirectedTester.cc (8948:e95ee70f876c)
1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
15 * Copyright (c) 2009-2010 Advanced Micro Devices, Inc.
16 * All rights reserved.
17 *
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions are
20 * met: redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer;
22 * redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution;
25 * neither the name of the copyright holders nor the names of its
26 * contributors may be used to endorse or promote products derived from
27 * this software without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 */
41
42#include "cpu/testers/directedtest/DirectedGenerator.hh"
43#include "cpu/testers/directedtest/RubyDirectedTester.hh"
44#include "debug/DirectedTest.hh"
45#include "mem/ruby/eventqueue/RubyEventQueue.hh"
46#include "sim/sim_exit.hh"
47
48RubyDirectedTester::RubyDirectedTester(const Params *p)
49 : MemObject(p), directedStartEvent(this),
50 m_requests_to_complete(p->requests_to_complete),
51 generator(p->generator)
52{
53 m_requests_completed = 0;
54
55 // create the ports
56 for (int i = 0; i < p->port_cpuPort_connection_count; ++i) {
57 ports.push_back(new CpuPort(csprintf("%s-port%d", name(), i),
58 this, i));
59 }
60
61 // add the check start event to the event queue
62 schedule(directedStartEvent, 1);
63}
64
65RubyDirectedTester::~RubyDirectedTester()
66{
67 for (int i = 0; i < ports.size(); i++)
68 delete ports[i];
69}
70
71void
72RubyDirectedTester::init()
73{
74 assert(ports.size() > 0);
75 generator->setDirectedTester(this);
76}
77
78MasterPort &
79RubyDirectedTester::getMasterPort(const std::string &if_name, int idx)
80{
81 if (if_name != "cpuPort") {
82 // pass it along to our super class
83 return MemObject::getMasterPort(if_name, idx);
84 } else {
85 if (idx >= static_cast<int>(ports.size())) {
86 panic("RubyDirectedTester::getMasterPort: unknown index %d\n", idx);
87 }
88
89 return *ports[idx];
90 }
91}
92
1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
15 * Copyright (c) 2009-2010 Advanced Micro Devices, Inc.
16 * All rights reserved.
17 *
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions are
20 * met: redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer;
22 * redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution;
25 * neither the name of the copyright holders nor the names of its
26 * contributors may be used to endorse or promote products derived from
27 * this software without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 */
41
42#include "cpu/testers/directedtest/DirectedGenerator.hh"
43#include "cpu/testers/directedtest/RubyDirectedTester.hh"
44#include "debug/DirectedTest.hh"
45#include "mem/ruby/eventqueue/RubyEventQueue.hh"
46#include "sim/sim_exit.hh"
47
48RubyDirectedTester::RubyDirectedTester(const Params *p)
49 : MemObject(p), directedStartEvent(this),
50 m_requests_to_complete(p->requests_to_complete),
51 generator(p->generator)
52{
53 m_requests_completed = 0;
54
55 // create the ports
56 for (int i = 0; i < p->port_cpuPort_connection_count; ++i) {
57 ports.push_back(new CpuPort(csprintf("%s-port%d", name(), i),
58 this, i));
59 }
60
61 // add the check start event to the event queue
62 schedule(directedStartEvent, 1);
63}
64
65RubyDirectedTester::~RubyDirectedTester()
66{
67 for (int i = 0; i < ports.size(); i++)
68 delete ports[i];
69}
70
71void
72RubyDirectedTester::init()
73{
74 assert(ports.size() > 0);
75 generator->setDirectedTester(this);
76}
77
78MasterPort &
79RubyDirectedTester::getMasterPort(const std::string &if_name, int idx)
80{
81 if (if_name != "cpuPort") {
82 // pass it along to our super class
83 return MemObject::getMasterPort(if_name, idx);
84 } else {
85 if (idx >= static_cast<int>(ports.size())) {
86 panic("RubyDirectedTester::getMasterPort: unknown index %d\n", idx);
87 }
88
89 return *ports[idx];
90 }
91}
92
93Tick
94RubyDirectedTester::CpuPort::recvAtomic(PacketPtr pkt)
95{
96 panic("RubyDirectedTester::CpuPort::recvAtomic() not implemented!\n");
97 return 0;
98}
99
100bool
101RubyDirectedTester::CpuPort::recvTiming(PacketPtr pkt)
102{
103 tester->hitCallback(idx, pkt->getAddr());
104
105 //
106 // Now that the tester has completed, delete the packet, then return
107 //
108 delete pkt->req;
109 delete pkt;
110 return true;
111}
112
113MasterPort*
114RubyDirectedTester::getCpuPort(int idx)
115{
116 assert(idx >= 0 && idx < ports.size());
117
118 return ports[idx];
119}
120
121void
122RubyDirectedTester::hitCallback(NodeID proc, Addr addr)
123{
124 DPRINTF(DirectedTest,
125 "completed request for proc: %d addr: 0x%x\n",
126 proc,
127 addr);
128
129 generator->performCallback(proc, addr);
130 schedule(directedStartEvent, curTick());
131}
132
133void
134RubyDirectedTester::wakeup()
135{
136 if (m_requests_completed < m_requests_to_complete) {
137 if (!generator->initiate()) {
138 schedule(directedStartEvent, curTick() + 1);
139 }
140 } else {
141 exitSimLoop("Ruby DirectedTester completed");
142 }
143}
144
145RubyDirectedTester *
146RubyDirectedTesterParams::create()
147{
148 return new RubyDirectedTester(this);
149}
93bool
94RubyDirectedTester::CpuPort::recvTiming(PacketPtr pkt)
95{
96 tester->hitCallback(idx, pkt->getAddr());
97
98 //
99 // Now that the tester has completed, delete the packet, then return
100 //
101 delete pkt->req;
102 delete pkt;
103 return true;
104}
105
106MasterPort*
107RubyDirectedTester::getCpuPort(int idx)
108{
109 assert(idx >= 0 && idx < ports.size());
110
111 return ports[idx];
112}
113
114void
115RubyDirectedTester::hitCallback(NodeID proc, Addr addr)
116{
117 DPRINTF(DirectedTest,
118 "completed request for proc: %d addr: 0x%x\n",
119 proc,
120 addr);
121
122 generator->performCallback(proc, addr);
123 schedule(directedStartEvent, curTick());
124}
125
126void
127RubyDirectedTester::wakeup()
128{
129 if (m_requests_completed < m_requests_to_complete) {
130 if (!generator->initiate()) {
131 schedule(directedStartEvent, curTick() + 1);
132 }
133 } else {
134 exitSimLoop("Ruby DirectedTester completed");
135 }
136}
137
138RubyDirectedTester *
139RubyDirectedTesterParams::create()
140{
141 return new RubyDirectedTester(this);
142}