bpred_unit.hh (11427:fb512311295e) | bpred_unit.hh (11429:cf5af0cc3be4) |
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1/* 2 * Copyright (c) 2011-2012, 2014 ARM Limited 3 * Copyright (c) 2010 The University of Edinburgh 4 * All rights reserved 5 * 6 * The license below extends only to copyright in the software and shall 7 * not be construed as granting a license to any other intellectual 8 * property including but not limited to intellectual property relating --- 38 unchanged lines hidden (view full) --- 47#ifndef __CPU_PRED_BPRED_UNIT_HH__ 48#define __CPU_PRED_BPRED_UNIT_HH__ 49 50#include <deque> 51 52#include "base/statistics.hh" 53#include "base/types.hh" 54#include "cpu/pred/btb.hh" | 1/* 2 * Copyright (c) 2011-2012, 2014 ARM Limited 3 * Copyright (c) 2010 The University of Edinburgh 4 * All rights reserved 5 * 6 * The license below extends only to copyright in the software and shall 7 * not be construed as granting a license to any other intellectual 8 * property including but not limited to intellectual property relating --- 38 unchanged lines hidden (view full) --- 47#ifndef __CPU_PRED_BPRED_UNIT_HH__ 48#define __CPU_PRED_BPRED_UNIT_HH__ 49 50#include <deque> 51 52#include "base/statistics.hh" 53#include "base/types.hh" 54#include "cpu/pred/btb.hh" |
55#include "cpu/pred/indirect.hh" | |
56#include "cpu/pred/ras.hh" 57#include "cpu/inst_seq.hh" 58#include "cpu/static_inst.hh" 59#include "params/BranchPredictor.hh" 60#include "sim/probe/pmu.hh" 61#include "sim/sim_object.hh" 62 63/** --- 29 unchanged lines hidden (view full) --- 93 */ 94 bool predict(const StaticInstPtr &inst, const InstSeqNum &seqNum, 95 TheISA::PCState &pc, ThreadID tid); 96 bool predictInOrder(const StaticInstPtr &inst, const InstSeqNum &seqNum, 97 int asid, TheISA::PCState &instPC, 98 TheISA::PCState &predPC, ThreadID tid); 99 100 // @todo: Rename this function. | 55#include "cpu/pred/ras.hh" 56#include "cpu/inst_seq.hh" 57#include "cpu/static_inst.hh" 58#include "params/BranchPredictor.hh" 59#include "sim/probe/pmu.hh" 60#include "sim/sim_object.hh" 61 62/** --- 29 unchanged lines hidden (view full) --- 92 */ 93 bool predict(const StaticInstPtr &inst, const InstSeqNum &seqNum, 94 TheISA::PCState &pc, ThreadID tid); 95 bool predictInOrder(const StaticInstPtr &inst, const InstSeqNum &seqNum, 96 int asid, TheISA::PCState &instPC, 97 TheISA::PCState &predPC, ThreadID tid); 98 99 // @todo: Rename this function. |
101 virtual void uncondBranch(ThreadID tid, Addr pc, void * &bp_history) = 0; | 100 virtual void uncondBranch(Addr pc, void * &bp_history) = 0; |
102 103 /** 104 * Tells the branch predictor to commit any updates until the given 105 * sequence number. 106 * @param done_sn The sequence number to commit any older updates up until. 107 * @param tid The thread id. 108 */ 109 void update(const InstSeqNum &done_sn, ThreadID tid); --- 18 unchanged lines hidden (view full) --- 128 void squash(const InstSeqNum &squashed_sn, 129 const TheISA::PCState &corr_target, 130 bool actually_taken, ThreadID tid); 131 132 /** 133 * @param bp_history Pointer to the history object. The predictor 134 * will need to update any state and delete the object. 135 */ | 101 102 /** 103 * Tells the branch predictor to commit any updates until the given 104 * sequence number. 105 * @param done_sn The sequence number to commit any older updates up until. 106 * @param tid The thread id. 107 */ 108 void update(const InstSeqNum &done_sn, ThreadID tid); --- 18 unchanged lines hidden (view full) --- 127 void squash(const InstSeqNum &squashed_sn, 128 const TheISA::PCState &corr_target, 129 bool actually_taken, ThreadID tid); 130 131 /** 132 * @param bp_history Pointer to the history object. The predictor 133 * will need to update any state and delete the object. 134 */ |
136 virtual void squash(ThreadID tid, void *bp_history) = 0; | 135 virtual void squash(void *bp_history) = 0; |
137 138 /** 139 * Looks up a given PC in the BP to see if it is taken or not taken. 140 * @param inst_PC The PC to look up. 141 * @param bp_history Pointer that will be set to an object that 142 * has the branch predictor state associated with the lookup. 143 * @return Whether the branch is taken or not taken. 144 */ | 136 137 /** 138 * Looks up a given PC in the BP to see if it is taken or not taken. 139 * @param inst_PC The PC to look up. 140 * @param bp_history Pointer that will be set to an object that 141 * has the branch predictor state associated with the lookup. 142 * @return Whether the branch is taken or not taken. 143 */ |
145 virtual bool lookup(ThreadID tid, Addr instPC, void * &bp_history) = 0; | 144 virtual bool lookup(Addr instPC, void * &bp_history) = 0; |
146 147 /** 148 * If a branch is not taken, because the BTB address is invalid or missing, 149 * this function sets the appropriate counter in the global and local 150 * predictors to not taken. 151 * @param inst_PC The PC to look up the local predictor. 152 * @param bp_history Pointer that will be set to an object that 153 * has the branch predictor state associated with the lookup. 154 */ | 145 146 /** 147 * If a branch is not taken, because the BTB address is invalid or missing, 148 * this function sets the appropriate counter in the global and local 149 * predictors to not taken. 150 * @param inst_PC The PC to look up the local predictor. 151 * @param bp_history Pointer that will be set to an object that 152 * has the branch predictor state associated with the lookup. 153 */ |
155 virtual void btbUpdate(ThreadID tid, Addr instPC, void * &bp_history) = 0; | 154 virtual void btbUpdate(Addr instPC, void * &bp_history) = 0; |
156 157 /** 158 * Looks up a given PC in the BTB to see if a matching entry exists. 159 * @param inst_PC The PC to look up. 160 * @return Whether the BTB contains the given PC. 161 */ 162 bool BTBValid(Addr instPC) 163 { return BTB.valid(instPC, 0); } --- 11 unchanged lines hidden (view full) --- 175 * @param inst_PC The branch's PC that will be updated. 176 * @param taken Whether the branch was taken or not taken. 177 * @param bp_history Pointer to the branch predictor state that is 178 * associated with the branch lookup that is being updated. 179 * @param squashed Set to true when this function is called during a 180 * squash operation. 181 * @todo Make this update flexible enough to handle a global predictor. 182 */ | 155 156 /** 157 * Looks up a given PC in the BTB to see if a matching entry exists. 158 * @param inst_PC The PC to look up. 159 * @return Whether the BTB contains the given PC. 160 */ 161 bool BTBValid(Addr instPC) 162 { return BTB.valid(instPC, 0); } --- 11 unchanged lines hidden (view full) --- 174 * @param inst_PC The branch's PC that will be updated. 175 * @param taken Whether the branch was taken or not taken. 176 * @param bp_history Pointer to the branch predictor state that is 177 * associated with the branch lookup that is being updated. 178 * @param squashed Set to true when this function is called during a 179 * squash operation. 180 * @todo Make this update flexible enough to handle a global predictor. 181 */ |
183 virtual void update(ThreadID tid, Addr instPC, bool taken, 184 void *bp_history, bool squashed) = 0; | 182 virtual void update(Addr instPC, bool taken, void *bp_history, 183 bool squashed) = 0; |
185 /** 186 * Deletes the associated history with a branch, performs no predictor 187 * updates. Used for branches that mispredict and update tables but 188 * are still speculative and later retire. 189 * @param bp_history History to delete associated with this predictor 190 */ | 184 /** 185 * Deletes the associated history with a branch, performs no predictor 186 * updates. Used for branches that mispredict and update tables but 187 * are still speculative and later retire. 188 * @param bp_history History to delete associated with this predictor 189 */ |
191 virtual void retireSquashed(ThreadID tid, void *bp_history) = 0; | 190 virtual void retireSquashed(void *bp_history) = 0; |
192 193 /** 194 * Updates the BTB with the target of a branch. 195 * @param inst_PC The branch's PC that will be updated. 196 * @param target_PC The branch's target that will be added to the BTB. 197 */ 198 void BTBUpdate(Addr instPC, const TheISA::PCState &target) 199 { BTB.update(instPC, target, 0); } 200 | 191 192 /** 193 * Updates the BTB with the target of a branch. 194 * @param inst_PC The branch's PC that will be updated. 195 * @param target_PC The branch's target that will be added to the BTB. 196 */ 197 void BTBUpdate(Addr instPC, const TheISA::PCState &target) 198 { BTB.update(instPC, target, 0); } 199 |
201 202 virtual unsigned getGHR(ThreadID tid, void* bp_history) const { return 0; } 203 | |
204 void dump(); 205 206 private: 207 struct PredictorHistory { 208 /** 209 * Makes a predictor history struct that contains any 210 * information needed to update the predictor, BTB, and RAS. 211 */ 212 PredictorHistory(const InstSeqNum &seq_num, Addr instPC, 213 bool pred_taken, void *bp_history, 214 ThreadID _tid) 215 : seqNum(seq_num), pc(instPC), bpHistory(bp_history), RASTarget(0), 216 RASIndex(0), tid(_tid), predTaken(pred_taken), usedRAS(0), pushedRAS(0), | 200 void dump(); 201 202 private: 203 struct PredictorHistory { 204 /** 205 * Makes a predictor history struct that contains any 206 * information needed to update the predictor, BTB, and RAS. 207 */ 208 PredictorHistory(const InstSeqNum &seq_num, Addr instPC, 209 bool pred_taken, void *bp_history, 210 ThreadID _tid) 211 : seqNum(seq_num), pc(instPC), bpHistory(bp_history), RASTarget(0), 212 RASIndex(0), tid(_tid), predTaken(pred_taken), usedRAS(0), pushedRAS(0), |
217 wasCall(0), wasReturn(0), wasSquashed(0), wasIndirect(0) | 213 wasCall(0), wasReturn(0), wasSquashed(0) |
218 {} 219 220 bool operator==(const PredictorHistory &entry) const { 221 return this->seqNum == entry.seqNum; 222 } 223 224 /** The sequence number for the predictor history entry. */ 225 InstSeqNum seqNum; --- 28 unchanged lines hidden (view full) --- 254 /** Whether or not the instruction was a call. */ 255 bool wasCall; 256 257 /** Whether or not the instruction was a return. */ 258 bool wasReturn; 259 260 /** Whether this instruction has already mispredicted/updated bp */ 261 bool wasSquashed; | 214 {} 215 216 bool operator==(const PredictorHistory &entry) const { 217 return this->seqNum == entry.seqNum; 218 } 219 220 /** The sequence number for the predictor history entry. */ 221 InstSeqNum seqNum; --- 28 unchanged lines hidden (view full) --- 250 /** Whether or not the instruction was a call. */ 251 bool wasCall; 252 253 /** Whether or not the instruction was a return. */ 254 bool wasReturn; 255 256 /** Whether this instruction has already mispredicted/updated bp */ 257 bool wasSquashed; |
262 263 /** Wether this instruction was an indirect branch */ 264 bool wasIndirect; | |
265 }; 266 267 typedef std::deque<PredictorHistory> History; 268 269 /** Number of the threads for which the branch history is maintained. */ 270 const unsigned numThreads; 271 272 --- 5 unchanged lines hidden (view full) --- 278 std::vector<History> predHist; 279 280 /** The BTB. */ 281 DefaultBTB BTB; 282 283 /** The per-thread return address stack. */ 284 std::vector<ReturnAddrStack> RAS; 285 | 258 }; 259 260 typedef std::deque<PredictorHistory> History; 261 262 /** Number of the threads for which the branch history is maintained. */ 263 const unsigned numThreads; 264 265 --- 5 unchanged lines hidden (view full) --- 271 std::vector<History> predHist; 272 273 /** The BTB. */ 274 DefaultBTB BTB; 275 276 /** The per-thread return address stack. */ 277 std::vector<ReturnAddrStack> RAS; 278 |
286 /** Option to disable indirect predictor. */ 287 const bool useIndirect; 288 289 /** The indirect target predictor. */ 290 IndirectPredictor iPred; 291 | |
292 /** Stat for number of BP lookups. */ 293 Stats::Scalar lookups; 294 /** Stat for number of conditional branches predicted. */ 295 Stats::Scalar condPredicted; 296 /** Stat for number of conditional branches predicted incorrectly. */ 297 Stats::Scalar condIncorrect; 298 /** Stat for number of BTB lookups. */ 299 Stats::Scalar BTBLookups; 300 /** Stat for number of BTB hits. */ 301 Stats::Scalar BTBHits; 302 /** Stat for number of times the BTB is correct. */ 303 Stats::Scalar BTBCorrect; 304 /** Stat for percent times an entry in BTB found. */ 305 Stats::Formula BTBHitPct; 306 /** Stat for number of times the RAS is used to get a target. */ 307 Stats::Scalar usedRAS; 308 /** Stat for number of times the RAS is incorrect. */ 309 Stats::Scalar RASIncorrect; 310 | 279 /** Stat for number of BP lookups. */ 280 Stats::Scalar lookups; 281 /** Stat for number of conditional branches predicted. */ 282 Stats::Scalar condPredicted; 283 /** Stat for number of conditional branches predicted incorrectly. */ 284 Stats::Scalar condIncorrect; 285 /** Stat for number of BTB lookups. */ 286 Stats::Scalar BTBLookups; 287 /** Stat for number of BTB hits. */ 288 Stats::Scalar BTBHits; 289 /** Stat for number of times the BTB is correct. */ 290 Stats::Scalar BTBCorrect; 291 /** Stat for percent times an entry in BTB found. */ 292 Stats::Formula BTBHitPct; 293 /** Stat for number of times the RAS is used to get a target. */ 294 Stats::Scalar usedRAS; 295 /** Stat for number of times the RAS is incorrect. */ 296 Stats::Scalar RASIncorrect; 297 |
311 /** Stat for the number of indirect target lookups.*/ 312 Stats::Scalar indirectLookups; 313 /** Stat for the number of indirect target hits.*/ 314 Stats::Scalar indirectHits; 315 /** Stat for the number of indirect target misses.*/ 316 Stats::Scalar indirectMisses; 317 /** Stat for the number of indirect target mispredictions.*/ 318 Stats::Scalar indirectMispredicted; 319 | |
320 protected: 321 /** Number of bits to shift instructions by for predictor addresses. */ 322 const unsigned instShiftAmt; 323 324 /** 325 * @{ 326 * @name PMU Probe points. 327 */ --- 25 unchanged lines hidden --- | 298 protected: 299 /** Number of bits to shift instructions by for predictor addresses. */ 300 const unsigned instShiftAmt; 301 302 /** 303 * @{ 304 * @name PMU Probe points. 305 */ --- 25 unchanged lines hidden --- |