1/* 2 * Copyright (c) 2011-2012, 2014 ARM Limited 3 * Copyright (c) 2010 The University of Edinburgh 4 * All rights reserved 5 * 6 * The license below extends only to copyright in the software and shall 7 * not be construed as granting a license to any other intellectual 8 * property including but not limited to intellectual property relating --- 161 unchanged lines hidden (view full) --- 170 /** 171 * Updates the BP with taken/not taken information. 172 * @param inst_PC The branch's PC that will be updated. 173 * @param taken Whether the branch was taken or not taken. 174 * @param bp_history Pointer to the branch predictor state that is 175 * associated with the branch lookup that is being updated. 176 * @param squashed Set to true when this function is called during a 177 * squash operation. |
178 * @param inst Static instruction information 179 * @param corrTarget The resolved target of the branch (only needed 180 * for squashed branches) |
181 * @todo Make this update flexible enough to handle a global predictor. 182 */ 183 virtual void update(ThreadID tid, Addr instPC, bool taken, |
184 void *bp_history, bool squashed, 185 const StaticInstPtr & inst = StaticInst::nullStaticInstPtr, 186 Addr corrTarget = MaxAddr) = 0; |
187 /** 188 * Updates the BTB with the target of a branch. 189 * @param inst_PC The branch's PC that will be updated. 190 * @param target_PC The branch's target that will be added to the BTB. 191 */ 192 void BTBUpdate(Addr instPC, const TheISA::PCState &target) 193 { BTB.update(instPC, target, 0); } 194 --- 5 unchanged lines hidden (view full) --- 200 private: 201 struct PredictorHistory { 202 /** 203 * Makes a predictor history struct that contains any 204 * information needed to update the predictor, BTB, and RAS. 205 */ 206 PredictorHistory(const InstSeqNum &seq_num, Addr instPC, 207 bool pred_taken, void *bp_history, |
208 ThreadID _tid, const StaticInstPtr & inst) |
209 : seqNum(seq_num), pc(instPC), bpHistory(bp_history), RASTarget(0), 210 RASIndex(0), tid(_tid), predTaken(pred_taken), usedRAS(0), pushedRAS(0), |
211 wasCall(0), wasReturn(0), wasIndirect(0), 212 target(MaxAddr), inst(inst) |
213 {} 214 215 bool operator==(const PredictorHistory &entry) const { 216 return this->seqNum == entry.seqNum; 217 } 218 219 /** The sequence number for the predictor history entry. */ 220 InstSeqNum seqNum; --- 28 unchanged lines hidden (view full) --- 249 /** Whether or not the instruction was a call. */ 250 bool wasCall; 251 252 /** Whether or not the instruction was a return. */ 253 bool wasReturn; 254 255 /** Wether this instruction was an indirect branch */ 256 bool wasIndirect; |
257 258 /** Target of the branch. First it is predicted, and fixed later 259 * if necessary 260 */ 261 Addr target; 262 263 /** The branch instrction */ 264 const StaticInstPtr inst; |
265 }; 266 267 typedef std::deque<PredictorHistory> History; 268 269 /** Number of the threads for which the branch history is maintained. */ 270 const unsigned numThreads; 271 272 --- 80 unchanged lines hidden --- |