1/*
2 * Copyright (c) 2011-2012 ARM Limited
3 * Copyright (c) 2010 The University of Edinburgh
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating
9 * to a hardware implementation of the functionality of the software
10 * licensed hereunder. You may use the software subject to the license
11 * terms below provided that you ensure that this notice is replicated
12 * unmodified and in its entirety in all distributions of the software,
13 * modified or unmodified, in source code or in binary form.
14 *
15 * Copyright (c) 2004-2005 The Regents of The University of Michigan
16 * All rights reserved.
17 *
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions are
20 * met: redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer;
22 * redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution;
25 * neither the name of the copyright holders nor the names of its
26 * contributors may be used to endorse or promote products derived from
27 * this software without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 *
41 * Authors: Kevin Lim
42 * Korey Sewell
43 * Timothy M. Jones
44 * Nilay Vaish
45 */
46
47#ifndef __CPU_PRED_BPRED_UNIT_HH__
48#define __CPU_PRED_BPRED_UNIT_HH__
49
50#include <list>
51
52#include "base/statistics.hh"
53#include "base/types.hh"
54#include "cpu/pred/btb.hh"
55#include "cpu/pred/ras.hh"
56#include "cpu/inst_seq.hh"
57#include "cpu/static_inst.hh"
58#include "params/BranchPredictor.hh"
59#include "sim/sim_object.hh"
60
61/**
62 * Basically a wrapper class to hold both the branch predictor
63 * and the BTB.
64 */
65class BPredUnit : public SimObject
66{
67 public:
68 typedef BranchPredictorParams Params;
69 /**
70 * @param params The params object, that has the size of the BP and BTB.
71 */
72 BPredUnit(const Params *p);
73
74 /**
75 * Registers statistics.
76 */
77 void regStats();
78
79 /** Perform sanity checks after a drain. */
80 void drainSanityCheck() const;
81
82 /**
83 * Predicts whether or not the instruction is a taken branch, and the
84 * target of the branch if it is taken.
85 * @param inst The branch instruction.
86 * @param PC The predicted PC is passed back through this parameter.
87 * @param tid The thread id.
88 * @return Returns if the branch is taken or not.
89 */
90 bool predict(StaticInstPtr &inst, const InstSeqNum &seqNum,
91 TheISA::PCState &pc, ThreadID tid);
92 bool predictInOrder(StaticInstPtr &inst, const InstSeqNum &seqNum,
| 1/*
2 * Copyright (c) 2011-2012 ARM Limited
3 * Copyright (c) 2010 The University of Edinburgh
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating
9 * to a hardware implementation of the functionality of the software
10 * licensed hereunder. You may use the software subject to the license
11 * terms below provided that you ensure that this notice is replicated
12 * unmodified and in its entirety in all distributions of the software,
13 * modified or unmodified, in source code or in binary form.
14 *
15 * Copyright (c) 2004-2005 The Regents of The University of Michigan
16 * All rights reserved.
17 *
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions are
20 * met: redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer;
22 * redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution;
25 * neither the name of the copyright holders nor the names of its
26 * contributors may be used to endorse or promote products derived from
27 * this software without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 *
41 * Authors: Kevin Lim
42 * Korey Sewell
43 * Timothy M. Jones
44 * Nilay Vaish
45 */
46
47#ifndef __CPU_PRED_BPRED_UNIT_HH__
48#define __CPU_PRED_BPRED_UNIT_HH__
49
50#include <list>
51
52#include "base/statistics.hh"
53#include "base/types.hh"
54#include "cpu/pred/btb.hh"
55#include "cpu/pred/ras.hh"
56#include "cpu/inst_seq.hh"
57#include "cpu/static_inst.hh"
58#include "params/BranchPredictor.hh"
59#include "sim/sim_object.hh"
60
61/**
62 * Basically a wrapper class to hold both the branch predictor
63 * and the BTB.
64 */
65class BPredUnit : public SimObject
66{
67 public:
68 typedef BranchPredictorParams Params;
69 /**
70 * @param params The params object, that has the size of the BP and BTB.
71 */
72 BPredUnit(const Params *p);
73
74 /**
75 * Registers statistics.
76 */
77 void regStats();
78
79 /** Perform sanity checks after a drain. */
80 void drainSanityCheck() const;
81
82 /**
83 * Predicts whether or not the instruction is a taken branch, and the
84 * target of the branch if it is taken.
85 * @param inst The branch instruction.
86 * @param PC The predicted PC is passed back through this parameter.
87 * @param tid The thread id.
88 * @return Returns if the branch is taken or not.
89 */
90 bool predict(StaticInstPtr &inst, const InstSeqNum &seqNum,
91 TheISA::PCState &pc, ThreadID tid);
92 bool predictInOrder(StaticInstPtr &inst, const InstSeqNum &seqNum,
|
95
96 // @todo: Rename this function.
97 virtual void uncondBranch(void * &bp_history) = 0;
98
99 /**
100 * Tells the branch predictor to commit any updates until the given
101 * sequence number.
102 * @param done_sn The sequence number to commit any older updates up until.
103 * @param tid The thread id.
104 */
105 void update(const InstSeqNum &done_sn, ThreadID tid);
106
107 /**
108 * Squashes all outstanding updates until a given sequence number.
109 * @param squashed_sn The sequence number to squash any younger updates up
110 * until.
111 * @param tid The thread id.
112 */
113 void squash(const InstSeqNum &squashed_sn, ThreadID tid);
114
115 /**
116 * Squashes all outstanding updates until a given sequence number, and
117 * corrects that sn's update with the proper address and taken/not taken.
118 * @param squashed_sn The sequence number to squash any younger updates up
119 * until.
120 * @param corr_target The correct branch target.
121 * @param actually_taken The correct branch direction.
122 * @param tid The thread id.
123 */
124 void squash(const InstSeqNum &squashed_sn,
125 const TheISA::PCState &corr_target,
126 bool actually_taken, ThreadID tid);
127
128 /**
129 * @param bp_history Pointer to the history object. The predictor
130 * will need to update any state and delete the object.
131 */
132 virtual void squash(void *bp_history) = 0;
133
134 /**
135 * Looks up a given PC in the BP to see if it is taken or not taken.
136 * @param inst_PC The PC to look up.
137 * @param bp_history Pointer that will be set to an object that
138 * has the branch predictor state associated with the lookup.
139 * @return Whether the branch is taken or not taken.
140 */
141 virtual bool lookup(Addr instPC, void * &bp_history) = 0;
142
143 /**
144 * If a branch is not taken, because the BTB address is invalid or missing,
145 * this function sets the appropriate counter in the global and local
146 * predictors to not taken.
147 * @param inst_PC The PC to look up the local predictor.
148 * @param bp_history Pointer that will be set to an object that
149 * has the branch predictor state associated with the lookup.
150 */
151 virtual void btbUpdate(Addr instPC, void * &bp_history) = 0;
152
153 /**
154 * Looks up a given PC in the BTB to see if a matching entry exists.
155 * @param inst_PC The PC to look up.
156 * @return Whether the BTB contains the given PC.
157 */
158 bool BTBValid(Addr instPC)
159 { return BTB.valid(instPC, 0); }
160
161 /**
162 * Looks up a given PC in the BTB to get the predicted target.
163 * @param inst_PC The PC to look up.
164 * @return The address of the target of the branch.
165 */
166 TheISA::PCState BTBLookup(Addr instPC)
167 { return BTB.lookup(instPC, 0); }
168
169 /**
170 * Updates the BP with taken/not taken information.
171 * @param inst_PC The branch's PC that will be updated.
172 * @param taken Whether the branch was taken or not taken.
173 * @param bp_history Pointer to the branch predictor state that is
174 * associated with the branch lookup that is being updated.
175 * @param squashed Set to true when this function is called during a
176 * squash operation.
177 * @todo Make this update flexible enough to handle a global predictor.
178 */
179 virtual void update(Addr instPC, bool taken, void *bp_history,
180 bool squashed) = 0;
181
182 /**
183 * Updates the BTB with the target of a branch.
184 * @param inst_PC The branch's PC that will be updated.
185 * @param target_PC The branch's target that will be added to the BTB.
186 */
187 void BTBUpdate(Addr instPC, const TheISA::PCState &target)
188 { BTB.update(instPC, target, 0); }
189
190 void dump();
191
192 private:
193 struct PredictorHistory {
194 /**
195 * Makes a predictor history struct that contains any
196 * information needed to update the predictor, BTB, and RAS.
197 */
198 PredictorHistory(const InstSeqNum &seq_num, Addr instPC,
199 bool pred_taken, void *bp_history,
200 ThreadID _tid)
201 : seqNum(seq_num), pc(instPC), bpHistory(bp_history), RASTarget(0),
202 RASIndex(0), tid(_tid), predTaken(pred_taken), usedRAS(0), pushedRAS(0),
203 wasCall(0), wasReturn(0)
204 {}
205
206 bool operator==(const PredictorHistory &entry) const {
207 return this->seqNum == entry.seqNum;
208 }
209
210 /** The sequence number for the predictor history entry. */
211 InstSeqNum seqNum;
212
213 /** The PC associated with the sequence number. */
214 Addr pc;
215
216 /** Pointer to the history object passed back from the branch
217 * predictor. It is used to update or restore state of the
218 * branch predictor.
219 */
220 void *bpHistory;
221
222 /** The RAS target (only valid if a return). */
223 TheISA::PCState RASTarget;
224
225 /** The RAS index of the instruction (only valid if a call). */
226 unsigned RASIndex;
227
228 /** The thread id. */
229 ThreadID tid;
230
231 /** Whether or not it was predicted taken. */
232 bool predTaken;
233
234 /** Whether or not the RAS was used. */
235 bool usedRAS;
236
237 /* Wether or not the RAS was pushed */
238 bool pushedRAS;
239
240 /** Whether or not the instruction was a call. */
241 bool wasCall;
242
243 /** Whether or not the instruction was a return. */
244 bool wasReturn;
245 };
246
247 typedef std::list<PredictorHistory> History;
248 typedef History::iterator HistoryIt;
249
250 /** Number of the threads for which the branch history is maintained. */
251 uint32_t numThreads;
252
253 /**
254 * The per-thread predictor history. This is used to update the predictor
255 * as instructions are committed, or restore it to the proper state after
256 * a squash.
257 */
258 History *predHist;
259
260 /** The BTB. */
261 DefaultBTB BTB;
262
263 /** The per-thread return address stack. */
264 ReturnAddrStack *RAS;
265
266 /** Stat for number of BP lookups. */
267 Stats::Scalar lookups;
268 /** Stat for number of conditional branches predicted. */
269 Stats::Scalar condPredicted;
270 /** Stat for number of conditional branches predicted incorrectly. */
271 Stats::Scalar condIncorrect;
272 /** Stat for number of BTB lookups. */
273 Stats::Scalar BTBLookups;
274 /** Stat for number of BTB hits. */
275 Stats::Scalar BTBHits;
276 /** Stat for number of times the BTB is correct. */
277 Stats::Scalar BTBCorrect;
278 /** Stat for percent times an entry in BTB found. */
279 Stats::Formula BTBHitPct;
280 /** Stat for number of times the RAS is used to get a target. */
281 Stats::Scalar usedRAS;
282 /** Stat for number of times the RAS is incorrect. */
283 Stats::Scalar RASIncorrect;
284};
285
286#endif // __CPU_PRED_BPRED_UNIT_HH__
| 95
96 // @todo: Rename this function.
97 virtual void uncondBranch(void * &bp_history) = 0;
98
99 /**
100 * Tells the branch predictor to commit any updates until the given
101 * sequence number.
102 * @param done_sn The sequence number to commit any older updates up until.
103 * @param tid The thread id.
104 */
105 void update(const InstSeqNum &done_sn, ThreadID tid);
106
107 /**
108 * Squashes all outstanding updates until a given sequence number.
109 * @param squashed_sn The sequence number to squash any younger updates up
110 * until.
111 * @param tid The thread id.
112 */
113 void squash(const InstSeqNum &squashed_sn, ThreadID tid);
114
115 /**
116 * Squashes all outstanding updates until a given sequence number, and
117 * corrects that sn's update with the proper address and taken/not taken.
118 * @param squashed_sn The sequence number to squash any younger updates up
119 * until.
120 * @param corr_target The correct branch target.
121 * @param actually_taken The correct branch direction.
122 * @param tid The thread id.
123 */
124 void squash(const InstSeqNum &squashed_sn,
125 const TheISA::PCState &corr_target,
126 bool actually_taken, ThreadID tid);
127
128 /**
129 * @param bp_history Pointer to the history object. The predictor
130 * will need to update any state and delete the object.
131 */
132 virtual void squash(void *bp_history) = 0;
133
134 /**
135 * Looks up a given PC in the BP to see if it is taken or not taken.
136 * @param inst_PC The PC to look up.
137 * @param bp_history Pointer that will be set to an object that
138 * has the branch predictor state associated with the lookup.
139 * @return Whether the branch is taken or not taken.
140 */
141 virtual bool lookup(Addr instPC, void * &bp_history) = 0;
142
143 /**
144 * If a branch is not taken, because the BTB address is invalid or missing,
145 * this function sets the appropriate counter in the global and local
146 * predictors to not taken.
147 * @param inst_PC The PC to look up the local predictor.
148 * @param bp_history Pointer that will be set to an object that
149 * has the branch predictor state associated with the lookup.
150 */
151 virtual void btbUpdate(Addr instPC, void * &bp_history) = 0;
152
153 /**
154 * Looks up a given PC in the BTB to see if a matching entry exists.
155 * @param inst_PC The PC to look up.
156 * @return Whether the BTB contains the given PC.
157 */
158 bool BTBValid(Addr instPC)
159 { return BTB.valid(instPC, 0); }
160
161 /**
162 * Looks up a given PC in the BTB to get the predicted target.
163 * @param inst_PC The PC to look up.
164 * @return The address of the target of the branch.
165 */
166 TheISA::PCState BTBLookup(Addr instPC)
167 { return BTB.lookup(instPC, 0); }
168
169 /**
170 * Updates the BP with taken/not taken information.
171 * @param inst_PC The branch's PC that will be updated.
172 * @param taken Whether the branch was taken or not taken.
173 * @param bp_history Pointer to the branch predictor state that is
174 * associated with the branch lookup that is being updated.
175 * @param squashed Set to true when this function is called during a
176 * squash operation.
177 * @todo Make this update flexible enough to handle a global predictor.
178 */
179 virtual void update(Addr instPC, bool taken, void *bp_history,
180 bool squashed) = 0;
181
182 /**
183 * Updates the BTB with the target of a branch.
184 * @param inst_PC The branch's PC that will be updated.
185 * @param target_PC The branch's target that will be added to the BTB.
186 */
187 void BTBUpdate(Addr instPC, const TheISA::PCState &target)
188 { BTB.update(instPC, target, 0); }
189
190 void dump();
191
192 private:
193 struct PredictorHistory {
194 /**
195 * Makes a predictor history struct that contains any
196 * information needed to update the predictor, BTB, and RAS.
197 */
198 PredictorHistory(const InstSeqNum &seq_num, Addr instPC,
199 bool pred_taken, void *bp_history,
200 ThreadID _tid)
201 : seqNum(seq_num), pc(instPC), bpHistory(bp_history), RASTarget(0),
202 RASIndex(0), tid(_tid), predTaken(pred_taken), usedRAS(0), pushedRAS(0),
203 wasCall(0), wasReturn(0)
204 {}
205
206 bool operator==(const PredictorHistory &entry) const {
207 return this->seqNum == entry.seqNum;
208 }
209
210 /** The sequence number for the predictor history entry. */
211 InstSeqNum seqNum;
212
213 /** The PC associated with the sequence number. */
214 Addr pc;
215
216 /** Pointer to the history object passed back from the branch
217 * predictor. It is used to update or restore state of the
218 * branch predictor.
219 */
220 void *bpHistory;
221
222 /** The RAS target (only valid if a return). */
223 TheISA::PCState RASTarget;
224
225 /** The RAS index of the instruction (only valid if a call). */
226 unsigned RASIndex;
227
228 /** The thread id. */
229 ThreadID tid;
230
231 /** Whether or not it was predicted taken. */
232 bool predTaken;
233
234 /** Whether or not the RAS was used. */
235 bool usedRAS;
236
237 /* Wether or not the RAS was pushed */
238 bool pushedRAS;
239
240 /** Whether or not the instruction was a call. */
241 bool wasCall;
242
243 /** Whether or not the instruction was a return. */
244 bool wasReturn;
245 };
246
247 typedef std::list<PredictorHistory> History;
248 typedef History::iterator HistoryIt;
249
250 /** Number of the threads for which the branch history is maintained. */
251 uint32_t numThreads;
252
253 /**
254 * The per-thread predictor history. This is used to update the predictor
255 * as instructions are committed, or restore it to the proper state after
256 * a squash.
257 */
258 History *predHist;
259
260 /** The BTB. */
261 DefaultBTB BTB;
262
263 /** The per-thread return address stack. */
264 ReturnAddrStack *RAS;
265
266 /** Stat for number of BP lookups. */
267 Stats::Scalar lookups;
268 /** Stat for number of conditional branches predicted. */
269 Stats::Scalar condPredicted;
270 /** Stat for number of conditional branches predicted incorrectly. */
271 Stats::Scalar condIncorrect;
272 /** Stat for number of BTB lookups. */
273 Stats::Scalar BTBLookups;
274 /** Stat for number of BTB hits. */
275 Stats::Scalar BTBHits;
276 /** Stat for number of times the BTB is correct. */
277 Stats::Scalar BTBCorrect;
278 /** Stat for percent times an entry in BTB found. */
279 Stats::Formula BTBHitPct;
280 /** Stat for number of times the RAS is used to get a target. */
281 Stats::Scalar usedRAS;
282 /** Stat for number of times the RAS is incorrect. */
283 Stats::Scalar RASIncorrect;
284};
285
286#endif // __CPU_PRED_BPRED_UNIT_HH__
|