1/*
2 * Copyright (c) 2011-2012, 2014 ARM Limited
3 * Copyright (c) 2010 The University of Edinburgh
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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47#ifndef __CPU_PRED_BPRED_UNIT_HH__
48#define __CPU_PRED_BPRED_UNIT_HH__
49
50#include <deque>
51
52#include "base/statistics.hh"
53#include "base/types.hh"
54#include "cpu/pred/btb.hh"
55#include "cpu/pred/ras.hh"
56#include "cpu/inst_seq.hh"
57#include "cpu/static_inst.hh"
58#include "params/BranchPredictor.hh"
59#include "sim/probe/pmu.hh"
60#include "sim/sim_object.hh"
61
62/**

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192 /**
193 * Updates the BTB with the target of a branch.
194 * @param inst_PC The branch's PC that will be updated.
195 * @param target_PC The branch's target that will be added to the BTB.
196 */
197 void BTBUpdate(Addr instPC, const TheISA::PCState &target)
198 { BTB.update(instPC, target, 0); }
199
200 void dump();
201
202 private:
203 struct PredictorHistory {
204 /**
205 * Makes a predictor history struct that contains any
206 * information needed to update the predictor, BTB, and RAS.
207 */
208 PredictorHistory(const InstSeqNum &seq_num, Addr instPC,
209 bool pred_taken, void *bp_history,
210 ThreadID _tid)
211 : seqNum(seq_num), pc(instPC), bpHistory(bp_history), RASTarget(0),
212 RASIndex(0), tid(_tid), predTaken(pred_taken), usedRAS(0), pushedRAS(0),
213 wasCall(0), wasReturn(0), wasSquashed(0)
214 {}
215
216 bool operator==(const PredictorHistory &entry) const {
217 return this->seqNum == entry.seqNum;
218 }
219
220 /** The sequence number for the predictor history entry. */
221 InstSeqNum seqNum;

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250 /** Whether or not the instruction was a call. */
251 bool wasCall;
252
253 /** Whether or not the instruction was a return. */
254 bool wasReturn;
255
256 /** Whether this instruction has already mispredicted/updated bp */
257 bool wasSquashed;
258 };
259
260 typedef std::deque<PredictorHistory> History;
261
262 /** Number of the threads for which the branch history is maintained. */
263 const unsigned numThreads;
264
265

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271 std::vector<History> predHist;
272
273 /** The BTB. */
274 DefaultBTB BTB;
275
276 /** The per-thread return address stack. */
277 std::vector<ReturnAddrStack> RAS;
278
279 /** Stat for number of BP lookups. */
280 Stats::Scalar lookups;
281 /** Stat for number of conditional branches predicted. */
282 Stats::Scalar condPredicted;
283 /** Stat for number of conditional branches predicted incorrectly. */
284 Stats::Scalar condIncorrect;
285 /** Stat for number of BTB lookups. */
286 Stats::Scalar BTBLookups;
287 /** Stat for number of BTB hits. */
288 Stats::Scalar BTBHits;
289 /** Stat for number of times the BTB is correct. */
290 Stats::Scalar BTBCorrect;
291 /** Stat for percent times an entry in BTB found. */
292 Stats::Formula BTBHitPct;
293 /** Stat for number of times the RAS is used to get a target. */
294 Stats::Scalar usedRAS;
295 /** Stat for number of times the RAS is incorrect. */
296 Stats::Scalar RASIncorrect;
297
298 protected:
299 /** Number of bits to shift instructions by for predictor addresses. */
300 const unsigned instShiftAmt;
301
302 /**
303 * @{
304 * @name PMU Probe points.
305 */

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