thread_context.hh (9382:1c97b57d5169) thread_context.hh (9426:0548b3e9734d)
1/*
1/*
2 * Copyright (c) 2011 ARM Limited
2 * Copyright (c) 2011-2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

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170
171 /** Copies the architectural registers from another TC into this TC. */
172 virtual void copyArchRegs(ThreadContext *tc);
173
174 /** Resets all architectural registers to 0. */
175 virtual void clearArchRegs();
176
177 /** Reads an integer register. */
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

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170
171 /** Copies the architectural registers from another TC into this TC. */
172 virtual void copyArchRegs(ThreadContext *tc);
173
174 /** Resets all architectural registers to 0. */
175 virtual void clearArchRegs();
176
177 /** Reads an integer register. */
178 virtual uint64_t readIntReg(int reg_idx);
178 virtual uint64_t readIntReg(int reg_idx) {
179 return readIntRegFlat(flattenIntIndex(reg_idx));
180 }
179
181
180 virtual FloatReg readFloatReg(int reg_idx);
182 virtual FloatReg readFloatReg(int reg_idx) {
183 return readFloatRegFlat(flattenFloatIndex(reg_idx));
184 }
181
185
182 virtual FloatRegBits readFloatRegBits(int reg_idx);
186 virtual FloatRegBits readFloatRegBits(int reg_idx) {
187 return readFloatRegBitsFlat(flattenFloatIndex(reg_idx));
188 }
183
184 /** Sets an integer register to a value. */
189
190 /** Sets an integer register to a value. */
185 virtual void setIntReg(int reg_idx, uint64_t val);
191 virtual void setIntReg(int reg_idx, uint64_t val) {
192 setIntRegFlat(flattenIntIndex(reg_idx), val);
193 }
186
194
187 virtual void setFloatReg(int reg_idx, FloatReg val);
195 virtual void setFloatReg(int reg_idx, FloatReg val) {
196 setFloatRegFlat(flattenFloatIndex(reg_idx), val);
197 }
188
198
189 virtual void setFloatRegBits(int reg_idx, FloatRegBits val);
199 virtual void setFloatRegBits(int reg_idx, FloatRegBits val) {
200 setFloatRegBitsFlat(flattenFloatIndex(reg_idx), val);
201 }
190
191 /** Reads this thread's PC state. */
192 virtual TheISA::PCState pcState()
193 { return cpu->pcState(thread->threadId()); }
194
195 /** Sets this thread's PC state. */
196 virtual void pcState(const TheISA::PCState &val);
197

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263 * reset all the state (see noSquashFromTC).
264 */
265 inline void conditionalSquash()
266 {
267 if (!thread->trapPending && !thread->noSquashFromTC)
268 cpu->squashFromTC(thread->threadId());
269 }
270
202
203 /** Reads this thread's PC state. */
204 virtual TheISA::PCState pcState()
205 { return cpu->pcState(thread->threadId()); }
206
207 /** Sets this thread's PC state. */
208 virtual void pcState(const TheISA::PCState &val);
209

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275 * reset all the state (see noSquashFromTC).
276 */
277 inline void conditionalSquash()
278 {
279 if (!thread->trapPending && !thread->noSquashFromTC)
280 cpu->squashFromTC(thread->threadId());
281 }
282
283 virtual uint64_t readIntRegFlat(int idx);
284 virtual void setIntRegFlat(int idx, uint64_t val);
285
286 virtual FloatReg readFloatRegFlat(int idx);
287 virtual void setFloatRegFlat(int idx, FloatReg val);
288
289 virtual FloatRegBits readFloatRegBitsFlat(int idx);
290 virtual void setFloatRegBitsFlat(int idx, FloatRegBits val);
271};
272
273#endif
291};
292
293#endif