thread_context.hh (7679:f26cc2c68b48) thread_context.hh (7720:65d338a8dba4)
1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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167
168 /** Sets an integer register to a value. */
169 virtual void setIntReg(int reg_idx, uint64_t val);
170
171 virtual void setFloatReg(int reg_idx, FloatReg val);
172
173 virtual void setFloatRegBits(int reg_idx, FloatRegBits val);
174
1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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167
168 /** Sets an integer register to a value. */
169 virtual void setIntReg(int reg_idx, uint64_t val);
170
171 virtual void setFloatReg(int reg_idx, FloatReg val);
172
173 virtual void setFloatRegBits(int reg_idx, FloatRegBits val);
174
175 /** Reads this thread's PC state. */
176 virtual TheISA::PCState pcState()
177 { return cpu->pcState(thread->threadId()); }
178
179 /** Sets this thread's PC state. */
180 virtual void pcState(const TheISA::PCState &val);
181
175 /** Reads this thread's PC. */
182 /** Reads this thread's PC. */
176 virtual uint64_t readPC()
177 { return cpu->readPC(thread->threadId()); }
183 virtual Addr instAddr()
184 { return cpu->instAddr(thread->threadId()); }
178
185
179 /** Sets this thread's PC. */
180 virtual void setPC(uint64_t val);
186 /** Reads this thread's next PC. */
187 virtual Addr nextInstAddr()
188 { return cpu->nextInstAddr(thread->threadId()); }
181
182 /** Reads this thread's next PC. */
189
190 /** Reads this thread's next PC. */
183 virtual uint64_t readNextPC()
184 { return cpu->readNextPC(thread->threadId()); }
191 virtual MicroPC microPC()
192 { return cpu->microPC(thread->threadId()); }
185
193
186 /** Sets this thread's next PC. */
187 virtual void setNextPC(uint64_t val);
188
189 virtual uint64_t readMicroPC()
190 { return cpu->readMicroPC(thread->threadId()); }
191
192 virtual void setMicroPC(uint64_t val);
193
194 virtual uint64_t readNextMicroPC()
195 { return cpu->readNextMicroPC(thread->threadId()); }
196
197 virtual void setNextMicroPC(uint64_t val);
198
199 /** Reads a miscellaneous register. */
200 virtual MiscReg readMiscRegNoEffect(int misc_reg)
201 { return cpu->readMiscRegNoEffect(misc_reg, thread->threadId()); }
202
203 /** Reads a misc. register, including any side-effects the
204 * read might have as defined by the architecture. */
205 virtual MiscReg readMiscReg(int misc_reg)
206 { return cpu->readMiscReg(misc_reg, thread->threadId()); }

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242#else
243 /** Returns pointer to the quiesce event. */
244 virtual EndQuiesceEvent *getQuiesceEvent()
245 {
246 return this->thread->quiesceEvent;
247 }
248#endif
249
194 /** Reads a miscellaneous register. */
195 virtual MiscReg readMiscRegNoEffect(int misc_reg)
196 { return cpu->readMiscRegNoEffect(misc_reg, thread->threadId()); }
197
198 /** Reads a misc. register, including any side-effects the
199 * read might have as defined by the architecture. */
200 virtual MiscReg readMiscReg(int misc_reg)
201 { return cpu->readMiscReg(misc_reg, thread->threadId()); }

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237#else
238 /** Returns pointer to the quiesce event. */
239 virtual EndQuiesceEvent *getQuiesceEvent()
240 {
241 return this->thread->quiesceEvent;
242 }
243#endif
244
250 virtual uint64_t readNextNPC()
251 {
252 return this->cpu->readNextNPC(this->thread->threadId());
253 }
254
255 virtual void setNextNPC(uint64_t val)
256 {
257 this->cpu->setNextNPC(val, this->thread->threadId());
258 }
259};
260
261#endif
245};
246
247#endif