1/* 2 * Copyright (c) 2011-2012 ARM Limited 3 * Copyright (c) 2013 Advanced Micro Devices, Inc. 4 * All rights reserved 5 * 6 * The license below extends only to copyright in the software and shall 7 * not be construed as granting a license to any other intellectual 8 * property including but not limited to intellectual property relating --- 175 unchanged lines hidden (view full) --- 184 virtual FloatRegBits readFloatRegBits(int reg_idx) { 185 return readFloatRegBitsFlat(flattenFloatIndex(reg_idx)); 186 } 187 188 virtual CCReg readCCReg(int reg_idx) { 189 return readCCRegFlat(flattenCCIndex(reg_idx)); 190 } 191 |
192 /** Sets an integer register to a value. */ 193 virtual void setIntReg(int reg_idx, uint64_t val) { 194 setIntRegFlat(flattenIntIndex(reg_idx), val); 195 } 196 197 virtual void setFloatReg(int reg_idx, FloatReg val) { 198 setFloatRegFlat(flattenFloatIndex(reg_idx), val); 199 } 200 201 virtual void setFloatRegBits(int reg_idx, FloatRegBits val) { 202 setFloatRegBitsFlat(flattenFloatIndex(reg_idx), val); 203 } 204 205 virtual void setCCReg(int reg_idx, CCReg val) { 206 setCCRegFlat(flattenCCIndex(reg_idx), val); 207 } 208 |
209 /** Reads this thread's PC state. */ 210 virtual TheISA::PCState pcState() 211 { return cpu->pcState(thread->threadId()); } 212 213 /** Sets this thread's PC state. */ 214 virtual void pcState(const TheISA::PCState &val); 215 216 virtual void pcStateNoRecord(const TheISA::PCState &val); --- 24 unchanged lines hidden (view full) --- 241 242 /** Sets a misc. register, including any side-effects the 243 * write might have as defined by the architecture. */ 244 virtual void setMiscReg(int misc_reg, const MiscReg &val); 245 246 virtual int flattenIntIndex(int reg); 247 virtual int flattenFloatIndex(int reg); 248 virtual int flattenCCIndex(int reg); |
249 virtual int flattenMiscIndex(int reg); 250 251 /** Returns the number of consecutive store conditional failures. */ 252 // @todo: Figure out where these store cond failures should go. 253 virtual unsigned readStCondFailures() 254 { return thread->storeCondFailures; } 255 256 /** Sets the number of consecutive store conditional failures. */ --- 29 unchanged lines hidden (view full) --- 286 virtual FloatReg readFloatRegFlat(int idx); 287 virtual void setFloatRegFlat(int idx, FloatReg val); 288 289 virtual FloatRegBits readFloatRegBitsFlat(int idx); 290 virtual void setFloatRegBitsFlat(int idx, FloatRegBits val); 291 292 virtual CCReg readCCRegFlat(int idx); 293 virtual void setCCRegFlat(int idx, CCReg val); |
294}; 295 296#endif |