1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29#include "base/trace.hh" 30 31#include "cpu/o3/free_list.hh" 32
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33SimpleFreeList::SimpleFreeList(unsigned _numLogicalIntRegs,
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33SimpleFreeList::SimpleFreeList(unsigned activeThreads, 34 unsigned _numLogicalIntRegs, |
35 unsigned _numPhysicalIntRegs, 36 unsigned _numLogicalFloatRegs, 37 unsigned _numPhysicalFloatRegs) 38 : numLogicalIntRegs(_numLogicalIntRegs), 39 numPhysicalIntRegs(_numPhysicalIntRegs), 40 numLogicalFloatRegs(_numLogicalFloatRegs), 41 numPhysicalFloatRegs(_numPhysicalFloatRegs), 42 numPhysicalRegs(numPhysicalIntRegs + numPhysicalFloatRegs) 43{
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43 DPRINTF(FreeList, "FreeList: Creating new free list object.\n");
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44 DPRINTF(FreeList, "Creating new free list object.\n"); |
45
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45 // DEBUG stuff.
46 freeIntRegsScoreboard.resize(numPhysicalIntRegs);
47
48 freeFloatRegsScoreboard.resize(numPhysicalRegs);
49
50 for (PhysRegIndex i = 0; i < numLogicalIntRegs; ++i) {
51 freeIntRegsScoreboard[i] = 0;
52 }
53
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46 // Put all of the extra physical registers onto the free list. This 47 // means excluding all of the base logical registers.
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56 for (PhysRegIndex i = numLogicalIntRegs;
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48 for (PhysRegIndex i = numLogicalIntRegs * activeThreads; |
49 i < numPhysicalIntRegs; ++i) 50 { 51 freeIntRegs.push(i);
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60
61 freeIntRegsScoreboard[i] = 1;
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52 } 53
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64 for (PhysRegIndex i = 0; i < numPhysicalIntRegs + numLogicalFloatRegs;
65 ++i)
66 {
67 freeFloatRegsScoreboard[i] = 0;
68 }
69
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54 // Put all of the extra physical registers onto the free list. This 55 // means excluding all of the base logical registers. Because the 56 // float registers' indices start where the physical registers end, 57 // some math must be done to determine where the free registers start.
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74 for (PhysRegIndex i = numPhysicalIntRegs + numLogicalFloatRegs;
75 i < numPhysicalRegs; ++i)
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58 PhysRegIndex i = numPhysicalIntRegs + (numLogicalFloatRegs * activeThreads); 59 60 for ( ; i < numPhysicalRegs; ++i) |
61 { 62 freeFloatRegs.push(i);
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78
79 freeFloatRegsScoreboard[i] = 1;
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63 } 64} 65
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66std::string 67SimpleFreeList::name() const 68{ 69 return "cpu.freelist"; 70} |
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