cpu_policy.hh (9915:d9e3ad574162) cpu_policy.hh (9919:803903a8dac1)
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the

--- 43 unchanged lines hidden (view full) ---

54 * change a structure such as the IQ, simply change the typedef here
55 * to use the desired class instead, and recompile. In order to
56 * create a different CPU to be used simultaneously with this one, see
57 * the alpha_impl.hh file for instructions.
58 */
59template<class Impl>
60struct SimpleCPUPolicy
61{
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer;
10 * redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the

--- 43 unchanged lines hidden (view full) ---

55 * change a structure such as the IQ, simply change the typedef here
56 * to use the desired class instead, and recompile. In order to
57 * create a different CPU to be used simultaneously with this one, see
58 * the alpha_impl.hh file for instructions.
59 */
60template<class Impl>
61struct SimpleCPUPolicy
62{
62 /** Typedef for the register file. Most classes assume a unified
63 * physical register file.
64 */
65 typedef PhysRegFile RegFile;
66 /** Typedef for the freelist of registers. */
63 /** Typedef for the freelist of registers. */
67 typedef SimpleFreeList FreeList;
64 typedef UnifiedFreeList FreeList;
68 /** Typedef for the rename map. */
65 /** Typedef for the rename map. */
69 typedef SimpleRenameMap RenameMap;
66 typedef UnifiedRenameMap RenameMap;
70 /** Typedef for the ROB. */
71 typedef ::ROB<Impl> ROB;
72 /** Typedef for the instruction queue/scheduler. */
73 typedef InstructionQueue<Impl> IQ;
74 /** Typedef for the memory dependence unit. */
75 typedef ::MemDepUnit<StoreSet, Impl> MemDepUnit;
76 /** Typedef for the LSQ. */
77 typedef ::LSQ<Impl> LSQ;

--- 35 unchanged lines hidden --- 		67 /** Typedef for the ROB. */
68 typedef ::ROB<Impl> ROB;
69 /** Typedef for the instruction queue/scheduler. */
70 typedef InstructionQueue<Impl> IQ;
71 /** Typedef for the memory dependence unit. */
72 typedef ::MemDepUnit<StoreSet, Impl> MemDepUnit;
73 /** Typedef for the LSQ. */
74 typedef ::LSQ<Impl> LSQ;

--- 35 unchanged lines hidden ---