comm.hh (12105:742d80361989) comm.hh (12106:7784fac1b159)
1/*
2 * Copyright (c) 2011, 2016 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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47
48#include <vector>
49
50#include "arch/types.hh"
51#include "base/types.hh"
52#include "cpu/inst_seq.hh"
53#include "sim/faults.hh"
54
1/*
2 * Copyright (c) 2011, 2016 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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47
48#include <vector>
49
50#include "arch/types.hh"
51#include "base/types.hh"
52#include "cpu/inst_seq.hh"
53#include "sim/faults.hh"
54
55// Typedef for physical register index type. Although the Impl would be the
56// most likely location for this, there are a few classes that need this
57// typedef yet are not templated on the Impl. For now it will be defined here.
58typedef short int PhysRegIndex;
59// Physical register ID
60// Associate a physical register index to a register class and
61// so it is easy to track which type of register are used.
62// A flat index is also provided for when it is useful to have a unified
63// indexing (for the dependency graph and the scoreboard for example)
64struct PhysRegId {
65 RegClass regClass;
66 PhysRegIndex regIdx;
55/** Physical register index type.
56 * Although the Impl might be a better for this, but there are a few classes
57 * that need this typedef yet are not templated on the Impl.
58 */
59using PhysRegIndex = short int;
60
61/** Physical register ID.
62 * Like a register ID but physical. The inheritance is private because the
63 * only relationship between this types is functional, and it is done to
64 * prevent code replication. */
65class PhysRegId : private RegId {
66 private:
67 PhysRegIndex flatIdx;
67 PhysRegIndex flatIdx;
68 PhysRegId(RegClass _regClass, PhysRegIndex _regIdx,
68
69 public:
70 explicit PhysRegId() : RegId(IntRegClass, -1), flatIdx(-1) {}
71
72 /** Scalar PhysRegId constructor. */
73 explicit PhysRegId(RegClass _regClass, PhysRegIndex _regIdx,
69 PhysRegIndex _flatIdx)
74 PhysRegIndex _flatIdx)
70 : regClass(_regClass), regIdx(_regIdx), flatIdx(_flatIdx)
75 : RegId(_regClass, _regIdx), flatIdx(_flatIdx)
71 {}
72
76 {}
77
78 /** Visible RegId methods */
79 /** @{ */
80 using RegId::index;
81 using RegId::classValue;
82 using RegId::isZeroReg;
83 using RegId::className;
84 /** @} */
85 /**
86 * Explicit forward methods, to prevent comparisons of PhysRegId with
87 * RegIds.
88 */
89 /** @{ */
90 bool operator<(const PhysRegId& that) const {
91 return RegId::operator<(that);
92 }
93
73 bool operator==(const PhysRegId& that) const {
94 bool operator==(const PhysRegId& that) const {
74 return regClass == that.regClass && regIdx == that.regIdx;
95 return RegId::operator==(that);
75 }
76
77 bool operator!=(const PhysRegId& that) const {
96 }
97
98 bool operator!=(const PhysRegId& that) const {
78 return !(*this==that);
99 return RegId::operator!=(that);
79 }
100 }
101 /** @} */
80
102
81 bool isZeroReg() const
82 {
83 return (regIdx == TheISA::ZeroReg &&
84 (regClass == IntRegClass ||
85 (THE_ISA == ALPHA_ISA && regClass == FloatRegClass)));
86 }
87
88 /** @return true if it is an integer physical register. */
103 /** @return true if it is an integer physical register. */
89 bool isIntPhysReg() const { return regClass == IntRegClass; }
104 bool isIntPhysReg() const { return isIntReg(); }
90
91 /** @return true if it is a floating-point physical register. */
105
106 /** @return true if it is a floating-point physical register. */
92 bool isFloatPhysReg() const { return regClass == FloatRegClass; }
107 bool isFloatPhysReg() const { return isFloatReg(); }
93
94 /** @Return true if it is a condition-code physical register. */
108
109 /** @Return true if it is a condition-code physical register. */
95 bool isCCPhysReg() const { return regClass == CCRegClass; }
110 bool isCCPhysReg() const { return isCCReg(); }
96
111
112 /** @Return true if it is a condition-code physical register. */
113 bool isMiscPhysReg() const { return isMiscReg(); }
114
97 /**
98 * Returns true if this register is always associated to the same
99 * architectural register.
100 */
101 bool isFixedMapping() const
102 {
115 /**
116 * Returns true if this register is always associated to the same
117 * architectural register.
118 */
119 bool isFixedMapping() const
120 {
103 return regClass == MiscRegClass;
121 return !isRenameable();
104 }
122 }
123
124 /** Flat index accessor */
125 const PhysRegIndex& flatIndex() const { return flatIdx; }
105};
106
107// PhysRegIds only need to be created once and then we can use the following
108// to work with them
109typedef const PhysRegId* PhysRegIdPtr;
110
111/** Struct that defines the information passed from fetch to decode. */
112template<class Impl>

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127
128// PhysRegIds only need to be created once and then we can use the following
129// to work with them
130typedef const PhysRegId* PhysRegIdPtr;
131
132/** Struct that defines the information passed from fetch to decode. */
133template<class Impl>

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