1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Kevin Lim
29 */
30
31#ifndef __CPU_O3_COMM_HH__
32#define __CPU_O3_COMM_HH__
33
34#include <vector>
35
36#include "sim/faults.hh"
37#include "cpu/inst_seq.hh"
38#include "sim/host.hh"
39
40// Typedef for physical register index type. Although the Impl would be the
41// most likely location for this, there are a few classes that need this
42// typedef yet are not templated on the Impl. For now it will be defined here.
43typedef short int PhysRegIndex;
44
45/** Struct that defines the information passed from fetch to decode. */
46template<class Impl>
47struct DefaultFetchDefaultDecode {
48 typedef typename Impl::DynInstPtr DynInstPtr;
49
50 int size;
51
52 DynInstPtr insts[Impl::MaxWidth];
53 Fault fetchFault;
54 InstSeqNum fetchFaultSN;
55 bool clearFetchFault;
56};
57
58/** Struct that defines the information passed from decode to rename. */
59template<class Impl>
60struct DefaultDecodeDefaultRename {
61 typedef typename Impl::DynInstPtr DynInstPtr;
62
63 int size;
64
65 DynInstPtr insts[Impl::MaxWidth];
66};
67
68/** Struct that defines the information passed from rename to IEW. */
69template<class Impl>
70struct DefaultRenameDefaultIEW {
71 typedef typename Impl::DynInstPtr DynInstPtr;
72
73 int size;
74
75 DynInstPtr insts[Impl::MaxWidth];
76};
77
78/** Struct that defines the information passed from IEW to commit. */
79template<class Impl>
80struct DefaultIEWDefaultCommit {
81 typedef typename Impl::DynInstPtr DynInstPtr;
82
83 int size;
84
85 DynInstPtr insts[Impl::MaxWidth];
86
87 bool squash[Impl::MaxThreads];
88 bool branchMispredict[Impl::MaxThreads];
89 bool branchTaken[Impl::MaxThreads];
90 bool squashDelaySlot[Impl::MaxThreads];
91 uint64_t mispredPC[Impl::MaxThreads];
92 uint64_t nextPC[Impl::MaxThreads];
| 1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Kevin Lim
29 */
30
31#ifndef __CPU_O3_COMM_HH__
32#define __CPU_O3_COMM_HH__
33
34#include <vector>
35
36#include "sim/faults.hh"
37#include "cpu/inst_seq.hh"
38#include "sim/host.hh"
39
40// Typedef for physical register index type. Although the Impl would be the
41// most likely location for this, there are a few classes that need this
42// typedef yet are not templated on the Impl. For now it will be defined here.
43typedef short int PhysRegIndex;
44
45/** Struct that defines the information passed from fetch to decode. */
46template<class Impl>
47struct DefaultFetchDefaultDecode {
48 typedef typename Impl::DynInstPtr DynInstPtr;
49
50 int size;
51
52 DynInstPtr insts[Impl::MaxWidth];
53 Fault fetchFault;
54 InstSeqNum fetchFaultSN;
55 bool clearFetchFault;
56};
57
58/** Struct that defines the information passed from decode to rename. */
59template<class Impl>
60struct DefaultDecodeDefaultRename {
61 typedef typename Impl::DynInstPtr DynInstPtr;
62
63 int size;
64
65 DynInstPtr insts[Impl::MaxWidth];
66};
67
68/** Struct that defines the information passed from rename to IEW. */
69template<class Impl>
70struct DefaultRenameDefaultIEW {
71 typedef typename Impl::DynInstPtr DynInstPtr;
72
73 int size;
74
75 DynInstPtr insts[Impl::MaxWidth];
76};
77
78/** Struct that defines the information passed from IEW to commit. */
79template<class Impl>
80struct DefaultIEWDefaultCommit {
81 typedef typename Impl::DynInstPtr DynInstPtr;
82
83 int size;
84
85 DynInstPtr insts[Impl::MaxWidth];
86
87 bool squash[Impl::MaxThreads];
88 bool branchMispredict[Impl::MaxThreads];
89 bool branchTaken[Impl::MaxThreads];
90 bool squashDelaySlot[Impl::MaxThreads];
91 uint64_t mispredPC[Impl::MaxThreads];
92 uint64_t nextPC[Impl::MaxThreads];
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