1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright

--- 108 unchanged lines hidden (view full) ---

118
119 // @todo: Might want to package this kind of branch stuff into a single
120 // struct as it is used pretty frequently.
121 bool branchMispredict;
122 DynInstPtr mispredictInst;
123 bool branchTaken;
124 Addr mispredPC;
125 TheISA::PCState nextPC;
126
127 unsigned branchCount;
128 };
129
130 decodeComm decodeInfo[Impl::MaxThreads];
131
132 struct renameComm {
133 };
134

--- 11 unchanged lines hidden (view full) ---

146
147 unsigned dispatched;
148 unsigned dispatchedToLSQ;
149 };
150
151 iewComm iewInfo[Impl::MaxThreads];
152
153 struct commitComm {
154 bool usedROB;
155 unsigned freeROBEntries;
156 bool emptyROB;
157
158 bool squash;
159 bool robSquashing;
160
161 bool branchMispredict;
162 DynInstPtr mispredictInst;
163 bool branchTaken;
164 Addr mispredPC;
165 TheISA::PCState pc;
166
167 // Represents the instruction that has either been retired or
168 // squashed. Similar to having a single bus that broadcasts the
169 // retired or squashed sequence number.
170 InstSeqNum doneSeqNum;
171
172 //Just in case we want to do a commit/squash on a cycle
173 //(necessary for multiple ROBs?)
174 bool commitInsts;
175 InstSeqNum squashSeqNum;
176
177 // Communication specifically to the IQ to tell the IQ that it can
178 // schedule a non-speculative instruction.
179 InstSeqNum nonSpecSeqNum;
180
181 // Hack for now to send back an uncached access to the IEW stage.
182 bool uncached;
183 DynInstPtr uncachedLoad;
184
185 bool interruptPending;
186 bool clearInterrupt;
187 };
188
189 commitComm commitInfo[Impl::MaxThreads];
190
191 bool decodeBlock[Impl::MaxThreads];
192 bool decodeUnblock[Impl::MaxThreads];
193 bool renameBlock[Impl::MaxThreads];
194 bool renameUnblock[Impl::MaxThreads];
195 bool iewBlock[Impl::MaxThreads];
196 bool iewUnblock[Impl::MaxThreads];
197 bool commitBlock[Impl::MaxThreads];
198 bool commitUnblock[Impl::MaxThreads];
199};
200
201#endif //__CPU_O3_COMM_HH__