base.cc (9904:e672a39fd426) base.cc (9925:7840e90aff6c)
1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 964 unchanged lines hidden (view full) ---

973 const MemCmd cmd(write ? MemCmd::WriteReq : MemCmd::ReadReq);
974 Packet pkt(&mmio_req, cmd);
975 pkt.dataStatic(data);
976
977 if (mmio_req.isMmappedIpr()) {
978 const Cycles ipr_delay(write ?
979 TheISA::handleIprWrite(tc, &pkt) :
980 TheISA::handleIprRead(tc, &pkt));
1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 964 unchanged lines hidden (view full) ---

973 const MemCmd cmd(write ? MemCmd::WriteReq : MemCmd::ReadReq);
974 Packet pkt(&mmio_req, cmd);
975 pkt.dataStatic(data);
976
977 if (mmio_req.isMmappedIpr()) {
978 const Cycles ipr_delay(write ?
979 TheISA::handleIprWrite(tc, &pkt) :
980 TheISA::handleIprRead(tc, &pkt));
981 return clockEdge(ipr_delay);
981 return clockPeriod() * ipr_delay;
982 } else {
983 return dataPort.sendAtomic(&pkt);
984 }
985}
986
987void
988BaseKvmCPU::setSignalMask(const sigset_t *mask)
989{

--- 239 unchanged lines hidden --- 		982 } else {
983 return dataPort.sendAtomic(&pkt);
984 }
985}
986
987void
988BaseKvmCPU::setSignalMask(const sigset_t *mask)
989{

--- 239 unchanged lines hidden ---