base.cc (12154:9a9bc3c1b788) base.cc (12155:5dc92ea01323)
1/*
2 * Copyright (c) 2012, 2015 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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1142 const Cycles ipr_delay(write ?
1143 TheISA::handleIprWrite(tc, pkt) :
1144 TheISA::handleIprRead(tc, pkt));
1145 threadContextDirty = true;
1146 delete pkt->req;
1147 delete pkt;
1148 return clockPeriod() * ipr_delay;
1149 } else {
1/*
2 * Copyright (c) 2012, 2015 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 1133 unchanged lines hidden (view full) ---

1142 const Cycles ipr_delay(write ?
1143 TheISA::handleIprWrite(tc, pkt) :
1144 TheISA::handleIprRead(tc, pkt));
1145 threadContextDirty = true;
1146 delete pkt->req;
1147 delete pkt;
1148 return clockPeriod() * ipr_delay;
1149 } else {
1150 // Temporarily lock and migrate to the event queue of the
1151 // VM. This queue is assumed to "own" all devices we need to
1152 // access if running in multi-core mode.
1153 EventQueue::ScopedMigration migrate(vm.eventQueue());
1150 // Temporarily lock and migrate to the device event queue to
1151 // prevent races in multi-core mode.
1152 EventQueue::ScopedMigration migrate(deviceEventQueue());
1154
1155 return dataPort.submitIO(pkt);
1156 }
1157}
1158
1159void
1160BaseKvmCPU::setSignalMask(const sigset_t *mask)
1161{

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1154 return dataPort.submitIO(pkt);
1155 }
1156}
1157
1158void
1159BaseKvmCPU::setSignalMask(const sigset_t *mask)
1160{

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