base.cc (10407:a9023811bf9e) base.cc (10553:c1ad57c53a36)
1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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80 hostFactor(params->hostFactor),
81 drainManager(NULL),
82 ctrInsts(0)
83{
84 if (pageSize == -1)
85 panic("KVM: Failed to determine host page size (%i)\n",
86 errno);
87
1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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80 hostFactor(params->hostFactor),
81 drainManager(NULL),
82 ctrInsts(0)
83{
84 if (pageSize == -1)
85 panic("KVM: Failed to determine host page size (%i)\n",
86 errno);
87
88 thread = new SimpleThread(this, 0, params->system,
89 params->itb, params->dtb, params->isa[0]);
88 if (FullSystem)
89 thread = new SimpleThread(this, 0, params->system, params->itb, params->dtb,
90 params->isa[0]);
91 else
92 thread = new SimpleThread(this, /* thread_num */ 0, params->system,
93 params->workload[0], params->itb,
94 params->dtb, params->isa[0]);
95
90 thread->setStatus(ThreadContext::Halted);
91 tc = thread->getTC();
92 threadContexts.push_back(tc);
93}
94
95BaseKvmCPU::~BaseKvmCPU()
96{
97 if (_kvmRun)

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453 DPRINTF(Kvm, "SuspendContext %d\n", thread_num);
454
455 assert(thread_num == 0);
456 assert(thread);
457
458 if (_status == Idle)
459 return;
460
96 thread->setStatus(ThreadContext::Halted);
97 tc = thread->getTC();
98 threadContexts.push_back(tc);
99}
100
101BaseKvmCPU::~BaseKvmCPU()
102{
103 if (_kvmRun)

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459 DPRINTF(Kvm, "SuspendContext %d\n", thread_num);
460
461 assert(thread_num == 0);
462 assert(thread);
463
464 if (_status == Idle)
465 return;
466
461 assert(_status == Running);
467 assert(_status == Running || _status == RunningServiceCompletion);
462
463 // The tick event may no be scheduled if the quest has requested
464 // the monitor to wait for interrupts. The normal CPU models can
465 // get their tick events descheduled by quiesce instructions, but
466 // that can't happen here.
467 if (tickEvent.scheduled())
468 deschedule(tickEvent);
469

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1006
1007 if (mmio_req.isMmappedIpr()) {
1008 // We currently assume that there is no need to migrate to a
1009 // different event queue when doing IPRs. Currently, IPRs are
1010 // only used for m5ops, so it should be a valid assumption.
1011 const Cycles ipr_delay(write ?
1012 TheISA::handleIprWrite(tc, &pkt) :
1013 TheISA::handleIprRead(tc, &pkt));
468
469 // The tick event may no be scheduled if the quest has requested
470 // the monitor to wait for interrupts. The normal CPU models can
471 // get their tick events descheduled by quiesce instructions, but
472 // that can't happen here.
473 if (tickEvent.scheduled())
474 deschedule(tickEvent);
475

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1012
1013 if (mmio_req.isMmappedIpr()) {
1014 // We currently assume that there is no need to migrate to a
1015 // different event queue when doing IPRs. Currently, IPRs are
1016 // only used for m5ops, so it should be a valid assumption.
1017 const Cycles ipr_delay(write ?
1018 TheISA::handleIprWrite(tc, &pkt) :
1019 TheISA::handleIprRead(tc, &pkt));
1020 threadContextDirty = true;
1014 return clockPeriod() * ipr_delay;
1015 } else {
1016 // Temporarily lock and migrate to the event queue of the
1017 // VM. This queue is assumed to "own" all devices we need to
1018 // access if running in multi-core mode.
1019 EventQueue::ScopedMigration migrate(vm.eventQueue());
1020
1021 return dataPort.sendAtomic(&pkt);

--- 246 unchanged lines hidden --- 		1021 return clockPeriod() * ipr_delay;
1022 } else {
1023 // Temporarily lock and migrate to the event queue of the
1024 // VM. This queue is assumed to "own" all devices we need to
1025 // access if running in multi-core mode.
1026 EventQueue::ScopedMigration migrate(vm.eventQueue());
1027
1028 return dataPort.sendAtomic(&pkt);

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