cpu_impl.hh (6658:f4de76601762) cpu_impl.hh (7678:f19b6a3a8cec)
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 226 unchanged lines hidden (view full) ---

235
236 if (curStaticInst->isLoad()) {
237 ++numLoad;
238 }
239 }
240
241 if (fault != NoFault) {
242#if FULL_SYSTEM
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 226 unchanged lines hidden (view full) ---

235
236 if (curStaticInst->isLoad()) {
237 ++numLoad;
238 }
239 }
240
241 if (fault != NoFault) {
242#if FULL_SYSTEM
243 fault->invoke(tc);
243 fault->invoke(tc, curStaticInst);
244 willChangePC = true;
245 newPC = thread->readPC();
246 DPRINTF(Checker, "Fault, PC is now %#x\n", newPC);
247#endif
248 } else {
249#if THE_ISA != MIPS_ISA
250 // go to the next instruction
251 thread->setPC(thread->readNextPC());

--- 234 unchanged lines hidden --- 		244 willChangePC = true;
245 newPC = thread->readPC();
246 DPRINTF(Checker, "Fault, PC is now %#x\n", newPC);
247#endif
248 } else {
249#if THE_ISA != MIPS_ISA
250 // go to the next instruction
251 thread->setPC(thread->readNextPC());

--- 234 unchanged lines hidden ---