cpu_impl.hh (3120:e49afeaf79e9) cpu_impl.hh (3125:febd811bccc6)
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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89 inst = completed_inst;
90 youngestSN = completed_inst->seqNum;
91 } else {
92 return;
93 }
94 }
95 }
96
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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89 inst = completed_inst;
90 youngestSN = completed_inst->seqNum;
91 } else {
92 return;
93 }
94 }
95 }
96
97 unverifiedInst = inst;
98
97 // Try to check all instructions that are completed, ending if we
98 // run out of instructions to check or if an instruction is not
99 // yet completed.
100 while (1) {
101 DPRINTF(Checker, "Processing instruction [sn:%lli] PC:%#x.\n",
102 inst->seqNum, inst->readPC());
103 unverifiedResult.integer = inst->readIntResult();
104 unverifiedReq = inst->req;

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166 warn("%lli: Instruction PC %#x was not found in the ITB!",
167 curTick, thread->readPC());
168 handleError(inst);
169
170 // go to the next instruction
171 thread->setPC(thread->readNextPC());
172 thread->setNextPC(thread->readNextPC() + sizeof(MachInst));
173
99 // Try to check all instructions that are completed, ending if we
100 // run out of instructions to check or if an instruction is not
101 // yet completed.
102 while (1) {
103 DPRINTF(Checker, "Processing instruction [sn:%lli] PC:%#x.\n",
104 inst->seqNum, inst->readPC());
105 unverifiedResult.integer = inst->readIntResult();
106 unverifiedReq = inst->req;

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168 warn("%lli: Instruction PC %#x was not found in the ITB!",
169 curTick, thread->readPC());
170 handleError(inst);
171
172 // go to the next instruction
173 thread->setPC(thread->readNextPC());
174 thread->setNextPC(thread->readNextPC() + sizeof(MachInst));
175
174 return;
176 break;
175 } else {
176 // The instruction is carrying an ITB fault. Handle
177 // the fault and see if our results match the CPU on
178 // the next tick().
179 fault = inst->getFault();
180 }
181 }
182

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195
196 // decode the instruction
197 machInst = gtoh(machInst);
198 // Checks that the instruction matches what we expected it to be.
199 // Checks both the machine instruction and the PC.
200 validateInst(inst);
201
202 curStaticInst = StaticInst::decode(makeExtMI(machInst,
177 } else {
178 // The instruction is carrying an ITB fault. Handle
179 // the fault and see if our results match the CPU on
180 // the next tick().
181 fault = inst->getFault();
182 }
183 }
184

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197
198 // decode the instruction
199 machInst = gtoh(machInst);
200 // Checks that the instruction matches what we expected it to be.
201 // Checks both the machine instruction and the PC.
202 validateInst(inst);
203
204 curStaticInst = StaticInst::decode(makeExtMI(machInst,
203 thread->getTC()));
205 thread->readPC()));
204
205#if FULL_SYSTEM
206 thread->setInst(machInst);
207#endif // FULL_SYSTEM
208
209 fault = inst->getFault();
210 }
211
212 // Discard fetch's memReq.
213 delete memReq;
214 memReq = NULL;
215
216 // Either the instruction was a fault and we should process the fault,
217 // or we should just go ahead execute the instruction. This assumes
218 // that the instruction is properly marked as a fault.
219 if (fault == NoFault) {
220
221 thread->funcExeInst++;
222
206
207#if FULL_SYSTEM
208 thread->setInst(machInst);
209#endif // FULL_SYSTEM
210
211 fault = inst->getFault();
212 }
213
214 // Discard fetch's memReq.
215 delete memReq;
216 memReq = NULL;
217
218 // Either the instruction was a fault and we should process the fault,
219 // or we should just go ahead execute the instruction. This assumes
220 // that the instruction is properly marked as a fault.
221 if (fault == NoFault) {
222
223 thread->funcExeInst++;
224
223 fault = curStaticInst->execute(this, NULL);
225 if (!inst->isUnverifiable())
226 fault = curStaticInst->execute(this, NULL);
224
225 // Checks to make sure instrution results are correct.
226 validateExecution(inst);
227
228 if (curStaticInst->isLoad()) {
229 ++numLoad;
230 }
231 }

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284 break;
285 } else if (instList.front()->isCompleted()) {
286 inst = instList.front();
287 instList.pop_front();
288 } else {
289 break;
290 }
291 }
227
228 // Checks to make sure instrution results are correct.
229 validateExecution(inst);
230
231 if (curStaticInst->isLoad()) {
232 ++numLoad;
233 }
234 }

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287 break;
288 } else if (instList.front()->isCompleted()) {
289 inst = instList.front();
290 instList.pop_front();
291 } else {
292 break;
293 }
294 }
295 unverifiedInst = NULL;
292}
293
294template <class DynInstPtr>
295void
296Checker<DynInstPtr>::switchOut()
297{
298 instList.clear();
299}

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390 }
391 }
392}
393
394template <class DynInstPtr>
395void
396Checker<DynInstPtr>::validateState()
397{
296}
297
298template <class DynInstPtr>
299void
300Checker<DynInstPtr>::switchOut()
301{
302 instList.clear();
303}

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394 }
395 }
396}
397
398template <class DynInstPtr>
399void
400Checker<DynInstPtr>::validateState()
401{
402 if (updateThisCycle) {
403 warn("%lli: Instruction PC %#x results didn't match up, copying all "
404 "registers from main CPU", curTick, unverifiedInst->readPC());
405 // Heavy-weight copying of all registers
406 cpuXC->copyArchRegs(unverifiedInst->xcBase());
407 // Also advance the PC. Hopefully no PC-based events happened.
408#if THE_ISA != MIPS_ISA
409 // go to the next instruction
410 cpuXC->setPC(cpuXC->readNextPC());
411 cpuXC->setNextPC(cpuXC->readNextPC() + sizeof(MachInst));
412#else
413 // go to the next instruction
414 cpuXC->setPC(cpuXC->readNextPC());
415 cpuXC->setNextPC(cpuXC->readNextNPC());
416 cpuXC->setNextNPC(cpuXC->readNextNPC() + sizeof(MachInst));
417#endif
418 updateThisCycle = false;
398}
399
400template <class DynInstPtr>
401void
402Checker<DynInstPtr>::copyResult(DynInstPtr &inst)
403{
404 RegIndex idx = inst->destRegIdx(0);
405 if (idx < TheISA::FP_Base_DepTag) {

--- 53 unchanged lines hidden --- 		419}
420
421template <class DynInstPtr>
422void
423Checker<DynInstPtr>::copyResult(DynInstPtr &inst)
424{
425 RegIndex idx = inst->destRegIdx(0);
426 if (idx < TheISA::FP_Base_DepTag) {

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