cpu_impl.hh (12109:f29e9c5418aa) | cpu_impl.hh (12749:223c83ed9979) |
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1/* 2 * Copyright (c) 2011, 2016 ARM Limited 3 * Copyright (c) 2013 Advanced Micro Devices, Inc. 4 * All rights reserved 5 * 6 * The license below extends only to copyright in the software and shall 7 * not be construed as granting a license to any other intellectual 8 * property including but not limited to intellectual property relating --- 230 unchanged lines hidden (view full) --- 239 Addr fetch_PC = thread->instAddr(); 240 fetch_PC = (fetch_PC & PCMask) + fetchOffset; 241 242 MachInst machInst; 243 244 // If not in the middle of a macro instruction 245 if (!curMacroStaticInst) { 246 // set up memory request for instruction fetch | 1/* 2 * Copyright (c) 2011, 2016 ARM Limited 3 * Copyright (c) 2013 Advanced Micro Devices, Inc. 4 * All rights reserved 5 * 6 * The license below extends only to copyright in the software and shall 7 * not be construed as granting a license to any other intellectual 8 * property including but not limited to intellectual property relating --- 230 unchanged lines hidden (view full) --- 239 Addr fetch_PC = thread->instAddr(); 240 fetch_PC = (fetch_PC & PCMask) + fetchOffset; 241 242 MachInst machInst; 243 244 // If not in the middle of a macro instruction 245 if (!curMacroStaticInst) { 246 // set up memory request for instruction fetch |
247 memReq = new Request(unverifiedInst->threadNumber, fetch_PC, 248 sizeof(MachInst), 249 0, 250 masterId, 251 fetch_PC, thread->contextId()); 252 memReq->setVirt(0, fetch_PC, sizeof(MachInst), 253 Request::INST_FETCH, masterId, thread->instAddr()); | 247 auto mem_req = std::make_shared<Request>( 248 unverifiedInst->threadNumber, fetch_PC, 249 sizeof(MachInst), 0, masterId, fetch_PC, 250 thread->contextId()); |
254 | 251 |
252 mem_req->setVirt(0, fetch_PC, sizeof(MachInst), 253 Request::INST_FETCH, masterId, 254 thread->instAddr()); |
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255 | 255 |
256 fault = itb->translateFunctional(memReq, tc, BaseTLB::Execute); | 256 fault = itb->translateFunctional( 257 mem_req, tc, BaseTLB::Execute); |
257 258 if (fault != NoFault) { 259 if (unverifiedInst->getFault() == NoFault) { 260 // In this case the instruction was not a dummy 261 // instruction carrying an ITB fault. In the single 262 // threaded case the ITB should still be able to 263 // translate this instruction; in the SMT case it's 264 // possible that its ITB entry was kicked out. 265 warn("%lli: Instruction PC %s was not found in the " 266 "ITB!", curTick(), thread->pcState()); 267 handleError(unverifiedInst); 268 269 // go to the next instruction 270 advancePC(NoFault); 271 272 // Give up on an ITB fault.. | 258 259 if (fault != NoFault) { 260 if (unverifiedInst->getFault() == NoFault) { 261 // In this case the instruction was not a dummy 262 // instruction carrying an ITB fault. In the single 263 // threaded case the ITB should still be able to 264 // translate this instruction; in the SMT case it's 265 // possible that its ITB entry was kicked out. 266 warn("%lli: Instruction PC %s was not found in the " 267 "ITB!", curTick(), thread->pcState()); 268 handleError(unverifiedInst); 269 270 // go to the next instruction 271 advancePC(NoFault); 272 273 // Give up on an ITB fault.. |
273 delete memReq; | |
274 unverifiedInst = NULL; 275 return; 276 } else { 277 // The instruction is carrying an ITB fault. Handle 278 // the fault and see if our results match the CPU on 279 // the next tick(). 280 fault = unverifiedInst->getFault(); | 274 unverifiedInst = NULL; 275 return; 276 } else { 277 // The instruction is carrying an ITB fault. Handle 278 // the fault and see if our results match the CPU on 279 // the next tick(). 280 fault = unverifiedInst->getFault(); |
281 delete memReq; | |
282 break; 283 } 284 } else { | 281 break; 282 } 283 } else { |
285 PacketPtr pkt = new Packet(memReq, MemCmd::ReadReq); | 284 PacketPtr pkt = new Packet(mem_req, MemCmd::ReadReq); |
286 287 pkt->dataStatic(&machInst); 288 icachePort->sendFunctional(pkt); 289 machInst = gtoh(machInst); 290 | 285 286 pkt->dataStatic(&machInst); 287 icachePort->sendFunctional(pkt); 288 machInst = gtoh(machInst); 289 |
291 delete memReq; | |
292 delete pkt; 293 } 294 } 295 296 if (fault == NoFault) { 297 TheISA::PCState pcState = thread->pcState(); 298 299 if (isRomMicroPC(pcState.microPC())) { --- 422 unchanged lines hidden --- | 290 delete pkt; 291 } 292 } 293 294 if (fault == NoFault) { 295 TheISA::PCState pcState = thread->pcState(); 296 297 if (isRomMicroPC(pcState.microPC())) { --- 422 unchanged lines hidden --- |