598,599c598,599
< RegIndex idx = inst->destRegIdx(start_idx);
< switch (regIdxToClass(idx)) {
---
> RegId idx = inst->destRegIdx(start_idx);
> switch (idx.regClass) {
601c601
< thread->setIntReg(idx, mismatch_val);
---
> thread->setIntReg(idx.regIdx, mismatch_val);
604c604
< thread->setFloatRegBits(idx - TheISA::FP_Reg_Base, mismatch_val);
---
> thread->setFloatRegBits(idx.regIdx, mismatch_val);
607c607
< thread->setCCReg(idx - TheISA::CC_Reg_Base, mismatch_val);
---
> thread->setCCReg(idx.regIdx, mismatch_val);
610,611c610
< thread->setMiscReg(idx - TheISA::Misc_Reg_Base,
< mismatch_val);
---
> thread->setMiscReg(idx.regIdx, mismatch_val);
618c617
< RegIndex idx = inst->destRegIdx(i);
---
> RegId idx = inst->destRegIdx(i);
620c619
< switch (regIdxToClass(idx)) {
---
> switch (idx.regClass) {
622c621
< thread->setIntReg(idx, res);
---
> thread->setIntReg(idx.regIdx, res);
625c624
< thread->setFloatRegBits(idx - TheISA::FP_Reg_Base, res);
---
> thread->setFloatRegBits(idx.regIdx, res);
628c627
< thread->setCCReg(idx - TheISA::CC_Reg_Base, res);
---
> thread->setCCReg(idx.regIdx, res);
632c631
< thread->setMiscReg(idx - TheISA::Misc_Reg_Base, res);
---
> thread->setMiscReg(idx.regIdx, res);