cpu.cc (9384:877293183bdf) | cpu.cc (9608:e2b6b86fda03) |
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1/* 2 * Copyright (c) 2011 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 103 unchanged lines hidden (view full) --- 112 tc = thread->getTC(); 113 threadContexts.push_back(tc); 114 thread->kernelStats = NULL; 115 // Thread should never be null after this 116 assert(thread != NULL); 117} 118 119void | 1/* 2 * Copyright (c) 2011 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 103 unchanged lines hidden (view full) --- 112 tc = thread->getTC(); 113 threadContexts.push_back(tc); 114 thread->kernelStats = NULL; 115 // Thread should never be null after this 116 assert(thread != NULL); 117} 118 119void |
120CheckerCPU::setIcachePort(CpuPort *icache_port) | 120CheckerCPU::setIcachePort(MasterPort *icache_port) |
121{ 122 icachePort = icache_port; 123} 124 125void | 121{ 122 icachePort = icache_port; 123} 124 125void |
126CheckerCPU::setDcachePort(CpuPort *dcache_port) | 126CheckerCPU::setDcachePort(MasterPort *dcache_port) |
127{ 128 dcachePort = dcache_port; 129} 130 131void 132CheckerCPU::serialize(ostream &os) 133{ 134} --- 221 unchanged lines hidden --- | 127{ 128 dcachePort = dcache_port; 129} 130 131void 132CheckerCPU::serialize(ostream &os) 133{ 134} --- 221 unchanged lines hidden --- |