| cpu.cc (8949:3fa1ee293096) | cpu.cc (8990:5d80de4bbf96) |
|---|---|
| 1/* 2 * Copyright (c) 2011 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 250 unchanged lines hidden (view full) --- 259 260 /* 261 * We don't actually check memory for the store because there 262 * is no guarantee it has left the lsq yet, and therefore we 263 * can't verify the memory on stores without lsq snooping 264 * enabled. This is left as future work for the Checker: LSQ snooping 265 * and memory validation after stores have committed. 266 */ | 1/* 2 * Copyright (c) 2011 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 250 unchanged lines hidden (view full) --- 259 260 /* 261 * We don't actually check memory for the store because there 262 * is no guarantee it has left the lsq yet, and therefore we 263 * can't verify the memory on stores without lsq snooping 264 * enabled. This is left as future work for the Checker: LSQ snooping 265 * and memory validation after stores have committed. 266 */ |
| 267 bool was_prefetch = memReq->isPrefetch(); |
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| 267 268 delete memReq; 269 270 //If we don't need to access a second cache line, stop now. 271 if (fault != NoFault || secondAddr <= addr) 272 { | 268 269 delete memReq; 270 271 //If we don't need to access a second cache line, stop now. 272 if (fault != NoFault || secondAddr <= addr) 273 { |
| 273 if (fault != NoFault && memReq->isPrefetch()) { | 274 if (fault != NoFault && was_prefetch) { |
| 274 fault = NoFault; 275 } 276 break; 277 } 278 279 //Update size and access address 280 size = addr + fullSize - secondAddr; 281 //And access the right address. --- 71 unchanged lines hidden --- | 275 fault = NoFault; 276 } 277 break; 278 } 279 280 //Update size and access address 281 size = addr + fullSize - secondAddr; 282 //And access the right address. --- 71 unchanged lines hidden --- |