cpu.cc (4052:895ad21ffbf3) cpu.cc (5890:bdef71accd68)
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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154CheckerCPU::read(Addr addr, T &data, unsigned flags)
155{
156 // need to fill in CPU & thread IDs here
157 memReq = new Request();
158
159 memReq->setVirt(0, addr, sizeof(T), flags, thread->readPC());
160
161 // translate to physical address
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 145 unchanged lines hidden (view full) ---

154CheckerCPU::read(Addr addr, T &data, unsigned flags)
155{
156 // need to fill in CPU & thread IDs here
157 memReq = new Request();
158
159 memReq->setVirt(0, addr, sizeof(T), flags, thread->readPC());
160
161 // translate to physical address
162 translateDataReadReq(memReq);
162 dtb->translate(memReq, tc, false);
163
164 PacketPtr pkt = new Packet(memReq, Packet::ReadReq, Packet::Broadcast);
165
166 pkt->dataStatic(&data);
167
168 if (!(memReq->isUncacheable())) {
169 // Access memory to see if we have the same data
170 dcachePort->sendFunctional(pkt);

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224CheckerCPU::write(T data, Addr addr, unsigned flags, uint64_t *res)
225{
226 // need to fill in CPU & thread IDs here
227 memReq = new Request();
228
229 memReq->setVirt(0, addr, sizeof(T), flags, thread->readPC());
230
231 // translate to physical address
163
164 PacketPtr pkt = new Packet(memReq, Packet::ReadReq, Packet::Broadcast);
165
166 pkt->dataStatic(&data);
167
168 if (!(memReq->isUncacheable())) {
169 // Access memory to see if we have the same data
170 dcachePort->sendFunctional(pkt);

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224CheckerCPU::write(T data, Addr addr, unsigned flags, uint64_t *res)
225{
226 // need to fill in CPU & thread IDs here
227 memReq = new Request();
228
229 memReq->setVirt(0, addr, sizeof(T), flags, thread->readPC());
230
231 // translate to physical address
232 thread->translateDataWriteReq(memReq);
232 dtb->translate(memReq, tc, true);
233
234 // Can compare the write data and result only if it's cacheable,
235 // not a store conditional, or is a store conditional that
236 // succeeded.
237 // @todo: Verify that actual memory matches up with these values.
238 // Right now it only verifies that the instruction data is the
239 // same as what was in the request that got sent to memory; there
240 // is no verification that it is the same as what is in memory.

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320Addr
321CheckerCPU::dbg_vtophys(Addr addr)
322{
323 return vtophys(tc, addr);
324}
325#endif // FULL_SYSTEM
326
327bool
233
234 // Can compare the write data and result only if it's cacheable,
235 // not a store conditional, or is a store conditional that
236 // succeeded.
237 // @todo: Verify that actual memory matches up with these values.
238 // Right now it only verifies that the instruction data is the
239 // same as what was in the request that got sent to memory; there
240 // is no verification that it is the same as what is in memory.

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320Addr
321CheckerCPU::dbg_vtophys(Addr addr)
322{
323 return vtophys(tc, addr);
324}
325#endif // FULL_SYSTEM
326
327bool
328CheckerCPU::translateInstReq(Request *req)
329{
330#if FULL_SYSTEM
331 return (thread->translateInstReq(req) == NoFault);
332#else
333 thread->translateInstReq(req);
334 return true;
335#endif
336}
337
338void
339CheckerCPU::translateDataReadReq(Request *req)
340{
341 thread->translateDataReadReq(req);
342
343 if (req->getVaddr() != unverifiedReq->getVaddr()) {
344 warn("%lli: Request virtual addresses do not match! Inst: %#x, "
345 "checker: %#x",
346 curTick, unverifiedReq->getVaddr(), req->getVaddr());
347 handleError();
348 }
349 req->setPaddr(unverifiedReq->getPaddr());
350
351 if (checkFlags(req)) {
352 warn("%lli: Request flags do not match! Inst: %#x, checker: %#x",
353 curTick, unverifiedReq->getFlags(), req->getFlags());
354 handleError();
355 }
356}
357
358void
359CheckerCPU::translateDataWriteReq(Request *req)
360{
361 thread->translateDataWriteReq(req);
362
363 if (req->getVaddr() != unverifiedReq->getVaddr()) {
364 warn("%lli: Request virtual addresses do not match! Inst: %#x, "
365 "checker: %#x",
366 curTick, unverifiedReq->getVaddr(), req->getVaddr());
367 handleError();
368 }
369 req->setPaddr(unverifiedReq->getPaddr());
370
371 if (checkFlags(req)) {
372 warn("%lli: Request flags do not match! Inst: %#x, checker: %#x",
373 curTick, unverifiedReq->getFlags(), req->getFlags());
374 handleError();
375 }
376}
377
378bool
379CheckerCPU::checkFlags(Request *req)
380{
381 // Remove any dynamic flags that don't have to do with the request itself.
382 unsigned flags = unverifiedReq->getFlags();
383 unsigned mask = LOCKED | PHYSICAL | VPTE | ALTMODE | UNCACHEABLE | NO_FAULT;
384 flags = flags & (mask);
385 if (flags == req->getFlags()) {
386 return false;

--- 12 unchanged lines hidden --- 		328CheckerCPU::checkFlags(Request *req)
329{
330 // Remove any dynamic flags that don't have to do with the request itself.
331 unsigned flags = unverifiedReq->getFlags();
332 unsigned mask = LOCKED | PHYSICAL | VPTE | ALTMODE | UNCACHEABLE | NO_FAULT;
333 flags = flags & (mask);
334 if (flags == req->getFlags()) {
335 return false;

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