cpu.cc (10034:f2ce7114b137) cpu.cc (10342:711eb0e64249)
1/*
2 * Copyright (c) 2011,2013 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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165 memReq->getPaddr(), memReq->getFlags());
166 pAddr = memReq->getPaddr();
167 checked_flags = true;
168 }
169
170 // Now do the access
171 if (fault == NoFault &&
172 !memReq->getFlags().isSet(Request::NO_ACCESS)) {
1/*
2 * Copyright (c) 2011,2013 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 156 unchanged lines hidden (view full) ---

165 memReq->getPaddr(), memReq->getFlags());
166 pAddr = memReq->getPaddr();
167 checked_flags = true;
168 }
169
170 // Now do the access
171 if (fault == NoFault &&
172 !memReq->getFlags().isSet(Request::NO_ACCESS)) {
173 PacketPtr pkt = new Packet(memReq,
174 memReq->isLLSC() ?
175 MemCmd::LoadLockedReq :
176 MemCmd::ReadReq);
173 PacketPtr pkt = Packet::createRead(memReq);
177
178 pkt->dataStatic(data);
179
180 if (!(memReq->isUncacheable() || memReq->isMmappedIpr())) {
181 // Access memory to see if we have the same data
182 dcachePort->sendFunctional(pkt);
183 } else {
184 // Assume the data is correct if it's an uncached access

--- 169 unchanged lines hidden --- 		174
175 pkt->dataStatic(data);
176
177 if (!(memReq->isUncacheable() || memReq->isMmappedIpr())) {
178 // Access memory to see if we have the same data
179 dcachePort->sendFunctional(pkt);
180 } else {
181 // Assume the data is correct if it's an uncached access

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