1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 161 unchanged lines hidden (view full) --- 170 171 // translate to physical address 172 translateDataReadReq(memReq); 173 174 Packet *pkt = new Packet(memReq, Packet::ReadReq, Packet::Broadcast); 175 176 pkt->dataStatic(&data); 177 |
178 if (!(memReq->isUncacheable())) { |
179 // Access memory to see if we have the same data 180 dcachePort->sendFunctional(pkt); 181 } else { 182 // Assume the data is correct if it's an uncached access 183 memcpy(&data, &unverifiedResult.integer, sizeof(T)); 184 } 185 186 delete pkt; --- 59 unchanged lines hidden (view full) --- 246 // succeeded. 247 // @todo: Verify that actual memory matches up with these values. 248 // Right now it only verifies that the instruction data is the 249 // same as what was in the request that got sent to memory; there 250 // is no verification that it is the same as what is in memory. 251 // This is because the LSQ would have to be snooped in the CPU to 252 // verify this data. 253 if (unverifiedReq && |
254 !(unverifiedReq->isUncacheable()) && 255 (!(unverifiedReq->isLocked()) || 256 ((unverifiedReq->isLocked()) && |
257 unverifiedReq->getScResult() == 1))) { 258 T inst_data; 259/* 260 // This code would work if the LSQ allowed for snooping. 261 Packet *pkt = new Packet(memReq, Packet::ReadReq, Packet::Broadcast); 262 pkt.dataStatic(&inst_data); 263 264 dcachePort->sendFunctional(pkt); --- 144 unchanged lines hidden --- |