1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 67 unchanged lines hidden (view full) --- 76 77 changedPC = willChangePC = changedNextPC = false; 78 79 exitOnError = p->exitOnError; 80#if FULL_SYSTEM 81 itb = p->itb; 82 dtb = p->dtb; 83 systemPtr = NULL; |
84#else 85 process = p->process; 86#endif 87} 88 89CheckerCPU::~CheckerCPU() 90{ 91} 92 93void 94CheckerCPU::setMemory(MemObject *mem) 95{ |
96#if !FULL_SYSTEM |
97 memPtr = mem; |
98 thread = new SimpleThread(this, /* thread_num */ 0, process, 99 /* asid */ 0, mem); 100 101 thread->setStatus(ThreadContext::Suspended); 102 tc = thread->getTC(); 103 threadContexts.push_back(tc); |
104#endif 105} 106 |
107void 108CheckerCPU::setSystem(System *system) 109{ |
110#if FULL_SYSTEM |
111 systemPtr = system; 112 |
113 thread = new SimpleThread(this, 0, systemPtr, itb, dtb, false); |
114 |
115 thread->setStatus(ThreadContext::Suspended); 116 tc = thread->getTC(); 117 threadContexts.push_back(tc); 118 delete thread->kernelStats; 119 thread->kernelStats = NULL; |
120#endif |
121} |
122 123void 124CheckerCPU::setIcachePort(Port *icache_port) 125{ 126 icachePort = icache_port; 127} 128 129void --- 202 unchanged lines hidden (view full) --- 332 return write((uint32_t)data, addr, flags, res); 333} 334 335 336#if FULL_SYSTEM 337Addr 338CheckerCPU::dbg_vtophys(Addr addr) 339{ |
340 return vtophys(tc, addr); |
341} 342#endif // FULL_SYSTEM 343 344bool 345CheckerCPU::translateInstReq(Request *req) 346{ 347#if FULL_SYSTEM 348 return (thread->translateInstReq(req) == NoFault); --- 234 unchanged lines hidden (view full) --- 583 584 if (curStaticInst->isLoad()) { 585 ++numLoad; 586 } 587 } 588 589 if (fault != NoFault) { 590#if FULL_SYSTEM |
591 fault->invoke(tc); |
592 willChangePC = true; 593 newPC = thread->readPC(); 594 DPRINTF(Checker, "Fault, PC is now %#x\n", newPC); 595#else // !FULL_SYSTEM 596 fatal("fault (%d) detected @ PC 0x%08p", fault, thread->readPC()); 597#endif // FULL_SYSTEM 598 } else { 599#if THE_ISA != MIPS_ISA --- 12 unchanged lines hidden (view full) --- 612#if FULL_SYSTEM 613 // @todo: Determine if these should happen only if the 614 // instruction hasn't faulted. In the SimpleCPU case this may 615 // not be true, but in the O3 or Ozone case this may be true. 616 Addr oldpc; 617 int count = 0; 618 do { 619 oldpc = thread->readPC(); |
620 system->pcEventQueue.service(tc); |
621 count++; 622 } while (oldpc != thread->readPC()); 623 if (count > 1) { 624 willChangePC = true; 625 newPC = thread->readPC(); 626 DPRINTF(Checker, "PC Event, PC is now %#x\n", newPC); 627 } 628#endif --- 156 unchanged lines hidden --- |