cpu.cc (12355:568ec3a0c614) | cpu.cc (12680:91f4d6668b4f) |
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1/* 2 * Copyright (c) 2011,2013,2017 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 48 unchanged lines hidden (view full) --- 57#include "sim/full_system.hh" 58 59using namespace std; 60using namespace TheISA; 61 62void 63CheckerCPU::init() 64{ | 1/* 2 * Copyright (c) 2011,2013,2017 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 48 unchanged lines hidden (view full) --- 57#include "sim/full_system.hh" 58 59using namespace std; 60using namespace TheISA; 61 62void 63CheckerCPU::init() 64{ |
65 masterId = systemPtr->getMasterId(name()); | 65 masterId = systemPtr->getMasterId(this); |
66} 67 68CheckerCPU::CheckerCPU(Params *p) 69 : BaseCPU(p, true), systemPtr(NULL), icachePort(NULL), dcachePort(NULL), 70 tc(NULL), thread(NULL) 71{ 72 memReq = NULL; 73 curStaticInst = NULL; --- 289 unchanged lines hidden --- | 66} 67 68CheckerCPU::CheckerCPU(Params *p) 69 : BaseCPU(p, true), systemPtr(NULL), icachePort(NULL), dcachePort(NULL), 70 tc(NULL), thread(NULL) 71{ 72 memReq = NULL; 73 curStaticInst = NULL; --- 289 unchanged lines hidden --- |